AMKOR TECHNOLOGY, INC. 10-K

Item 1. Business OVERVIEW Amkor is one of the world’s leading providers of outsourced semiconductor packaging and test services. Amkor pioneered the outsourcing of semiconductor packaging and test services through a predecessor corporation in 1968, and over the years we have built a leading position by: • Designing and developing innovative packaging and test technologies; • Offering a broad portfolio of cost-effective solutions and services; • Focusing on strategic end markets that offer solid growth potential; • Cultivating long-standing relationships with our customers, which include many of the world’s leading semiconductor companies; • Collaborating with customers, original equipment manufacturers (“OEMs”) and equipment and material suppliers; • Developing a competitive cost structure with disciplined capital investment; • Building expertise in high-volume manufacturing processes and developing a reputation for high quality and solid execution; and • Providing a geographically diverse operating base, with research and development, engineering support and production capabilities at various facilities in China, Japan, Korea, Malaysia, the Philippines, Portugal and Taiwan. Our packaging and test services are designed to meet application and chip specific requirements including: the required type of interconnect technology; size; thickness; and electrical, mechanical and thermal performance. We provide turnkey packaging and test services including semiconductor wafer bump, wafer probe, wafer back-grind, package design, packaging, system-level and final test and drop shipment services. Our customers use us for one or more of these services. We provide our services to integrated device manufacturers (“IDMs”), “fabless” semiconductor companies, OEMs and contract foundries. IDMs generally design, manufacture, package and test semiconductors in their own facilities. However, the availability of technologically advanced outsourced manufacturing services has encouraged IDMs to outsource a portion of their manufacturing. Fabless semiconductor companies do not have factories and focus exclusively on the semiconductor design process and outsource virtually every step of the manufacturing process. Fabless semiconductor companies utilize contract foundries to manufacture their semiconductors in wafer form and companies such as Amkor for their packaging and test needs. Some companies will engage a contract foundry to manage the complete semiconductor manufacturing process, and in turn, the contract foundry will outsource some of its packaging and test needs. AVAILABLE INFORMATION Amkor files annual, quarterly and current reports, proxy statements and other information with the U.S. Securities and Exchange Commission (the “SEC”). The SEC maintains a website that contains annual, quarterly and current reports, proxy statements and other information that issuers (including Amkor) file electronically with the SEC. The SEC’s website is http://www.sec.gov . Amkor’s website is http://www.amkor.com. Amkor makes available, free of charge, through its website: our annual reports on Form 10-K; quarterly reports on Form 10-Q; current reports on Form 8-K; Forms 3, 4 and 5 filed on behalf of directors and executive officers and any amendments to those reports filed or furnished pursuant to the Securities Exchange Act of 1934, as amended (the “Exchange Act”), as soon as reasonably practicable after such material is electronically filed with, or furnished to, the SEC. We also make available, free of charge, through our website, our 3 Table of Contents Corporate Governance Guidelines, the charters of the Audit Committee, Nominating and Governance Committee and Compensation Committee of our Board of Directors, our Code of Business Conduct, our Code of Ethics for Directors and other information and materials. The information on Amkor’s website is not incorporated by reference into this report. INDUSTRY BACKGROUND Semiconductor devices are the essential building blocks used in most electronic products. As electronic and semiconductor devices have evolved, several important trends have emerged that have fueled the growth of the overall semiconductor industry, as well as the market for outsourced semiconductor packaging and test services. These trends include: • An increasing demand for mobile and connected devices, including the worldwide adoption of “smart” phones, tablets and other Internet-of-Things (IoT) devices that can access the internet and provide multimedia capabilities. • An increase in mobility and connectivity capabilities and growing digital content driving demand for new broadband wired and wireless networking equipment. • The proliferation of semiconductor devices into well-established end products such as automotive systems due to increased use of electronics for safety, navigation, fuel efficiency, emission reduction and entertainment systems. • An overall increase in the semiconductor content within electronic products to provide greater functionality and higher levels of performance. • The emergence of specialized chips designed to collect, analyze and store the digital content driven by the growth of cloud computing. These chips, sometimes referred to as “chiplets,” include data accelerators, artificial intelligence and machine learning devices. The semiconductor industry is adopting a chiplet based approach to reduce the overall cost, improve the individual yields and deliver required performance. In this type of packaging, diverse dies of different geometries are positioned close to each other within the same package. • The growth of advanced System-in-Package (“SiP”) modules where multiple semiconductor and other electronic components with different functionalities are combined into a single package. The increasing demand for miniaturization and higher functionality at competitive cost is driving the adoption of advanced SiP in new products. Advanced SiPs are the primary vehicle for package-level integration, which allow customers to combine integrated circuits (“ICs”) from different silicon nodes and different foundries. As a supplier in the semiconductor industry, our business is cyclical by nature and impacted by broad economic factors, such as worldwide gross domestic product and consumer spending. Historical trends indicate there has been a strong correlation between worldwide gross domestic product levels, consumer spending and semiconductor industry cycles. Outsourcing Trends in Semiconductor Manufacturing Semiconductor companies outsource their packaging and test needs to service providers such as Amkor for the following reasons: Packaging and test service providers have developed expertise in advanced technologies. The increasing demands for miniaturization, greater functionality, lower power consumption and improved thermal and electrical performance are driving the continuous development of semiconductor packaging and test technologies that are more sophisticated, complex and customized. This trend has led many semiconductor companies and OEMs to view packaging and test as enabling technologies requiring the kind of leading-edge expertise for technological innovation found in the leading outsourced assembly and test companies. At the same time, these companies are often looking to reduce the internal manufacturing and research and development costs in packaging and test solutions. As a result, many of these companies are increasingly relying on packaging and test service providers as key sources for new package designs and advanced interconnect technologies. 4 Table of Contents Packaging and test service providers offer a cost-effective solution in a highly cyclical, capital intensive industry. The semiconductor industry is cyclical by nature and impacted by broad economic factors, such as changes in worldwide gross domestic product and consumer spending. Semiconductor packaging and test are complex processes requiring substantial investment in specialized equipment, factories and human capital. As a result of this cyclicality and the large investments required, manufacturing facilities must operate at consistently high levels of utilization to be cost-effective. Shorter product life cycles, coupled with the need to update or replace packaging and test equipment to accommodate new package types, make it more difficult for integrated semiconductor companies to maintain cost-effective utilization of their packaging and test assets throughout semiconductor industry cycles. Packaging and test service providers, on the other hand, can typically use their assets to support a broad range of customers and multiple end markets, potentially generating more efficient use of their production assets and a more cost-effective solution. Packaging and test service providers can facilitate a more efficient supply chain and help shorten time-to-market for new products. We believe that semiconductor companies, together with their customers, are seeking to shorten the time-to-market for their new products and that having an effective supply chain is a critical factor in facilitating timely and successful product introductions. Packaging and test service providers have the resources and expertise to timely develop their capabilities and implement new packaging technology in volume. For this reason, semiconductor companies and OEMs are leveraging the capabilities of packaging and test service providers to deliver their new products to market more quickly. High quality packaging and test service providers enable semiconductor manufacturers to focus their resources on semiconductor design and wafer fabrication. As semiconductor process technology migrates to larger wafers and smaller feature sizes, the cost of building a state-of-the-art wafer fabrication factory has risen significantly and can now be several billions of dollars. The high cost of investing in next generation silicon technology and equipment is causing many semiconductor companies to adopt or maintain a “fabless” or “fab-lite” strategy to reduce or eliminate their investment in wafer fabrication and associated packaging and test operations. As a result, these companies are increasing their reliance on outsourced providers of semiconductor manufacturing services, including packaging and test solutions. STRATEGY AND COMPETITIVE STRENGTHS Strategy Our financial goals are sales growth and improved profitability, and we are focusing on the following strategies to achieve these goals: Leverage Our Investment in Services for Advanced Technologies We are an industry leader in developing and commercializing cost-effective advanced packaging and test technologies. We believe these advanced technology solutions provide increased value to our customers. An important factor for success in the advanced packaging and test area is to generate reasonably quick returns on investments made in support of customers seeking leading-edge technologies. In recent years we have made significant investments in state-of-the-art facilities and equipment to provide services for the industry’s most complex devices. With approximately 650 employees engaged in research and development and manufacturing process engineering for new semiconductor packaging and test technologies, we are a technology leader in areas such as fine pitch bumping, advanced flip chip, wafer-level processing and advanced SiPs. During 2020, we had success capitalizing on our advanced technology to achieve design wins and new product introductions in areas such as: chips fabricated at 5, 7, 10, 14 and 16 nanometer geometries; advanced SiP products including radio frequency (“RF”), front end modules and micro-electro-mechanical systems (“MEMS”) devices; optical sensors and cavity MEMS; advanced Flip Chip with Through Silicon Via (“TSV”) technology; wafer-level Chip Scale Packaging (“CSP”); and wafer-level fan-out packages. We work closely with our customers to develop cost-effective leading-edge packages for the next generation of devices. These include integrated technologies such as advanced SiP, wafer-level fan-out, Silicon Wafer Integrated Fan-out 5 Table of Contents Technology (“SWIFT”), High Density Fan-Out (“HDFO”) and redistribution layer (“RDL”) solutions which enable very thin, very small products combining application processors, memory, baseband and other peripheral integrated circuits (“ICs”). They also include packages utilizing TSV interconnects and silicon interposers which enable the integration of high-performance chips such as high bandwidth memory and graphics processors into a single package. Our approach is to work with lead customers to develop processes that will enable volume manufacturing with high yields and reliability. We believe that advanced packaging services will continue to grow as our customers and leading electronics OEMs strive for smaller device geometries, higher levels of integration and performance and lower power consumption. We intend to continue to leverage our investment in advanced technology to meet the demand for these services in high growth markets. Improve Utilization of Existing Assets and Broaden Our Customer Base Another key to our success is to improve the utilization of our existing assets. The transition by leading edge customers to newer packaging and test equipment platforms typically frees up capacity in existing, previously installed equipment. As part of our strategy, we are focused on developing a second wave of customers to more effectively utilize these assets over a longer period of time. We are building and utilizing manufacturing lines which support multiple customers and increasing factory utilization through more sophisticated planning processes and more intensive efficiency improvement activities. Balanced Growth Revenue growth is a significant objective for Amkor. We strive to grow in a balanced way and avoid over-reliance on any single market or customer. Our goal is to achieve more consistent financial performance through all phases of the business cycle. Our balanced growth strategy consists of the following two components: • First, we are increasing our revenue in markets beyond communications, including consumer, computing and automotive and industrial end markets. As computing power increases in additional applications, these additional markets are requiring more advanced packaging technology. Revenue from these markets tends to be more stable, with less pronounced seasonality tied to the launch of flagship phones. • Second, we continue to focus on share gains in the iOS and high-end Android ecosystems, leveraging our expertise in advanced SiP, MEMS and other advanced packages to expand our content in next generation 5G phones. Selectively Grow Our Scale and Scope through Strategic Investments From time to time we see attractive opportunities to grow our customer base and expand markets through strategic investments. For example, in 2017 we completed the acquisition of Nanium, S.A. (“Nanium”), a provider of wafer-level fan-out semiconductor packaging solutions. We believe that this acquisition has strengthened our position in the market for wafer-level packaging. We believe that selective growth through joint ventures, acquisitions and other strategic investments can help diversify our revenue streams, improve our profits and maintain our technological leadership. Competitive Strengths The outsourced semiconductor packaging and test market is very competitive. We also compete with the internal semiconductor packaging and test capabilities of many of our customers and foundries. We believe we are well-positioned in the outsourced packaging and test services market. The following competitive strengths allow us to build upon our industry position and to remain one of the preferred providers of semiconductor packaging and test services. Leading Technology Innovator We are a leader in developing and deploying advanced semiconductor packaging and test solutions. We have designed and developed several state-of-the-art package formats and technologies, including our Package-on-Package (“PoP”) platform with Through Mold Via (“TMV”) technology, molded embedded packages, FusionQuad, flip chip ball grid array, multi-chip modules with a silicon interposer placed between the module chips and substrate, copper pillar bumping and fine pitch copper pillar flip chip packaging technologies. In addition, we believe that as semiconductor 6 Table of Contents technology continues to achieve smaller device geometries with higher levels of integration, speed and performance, packages will increasingly require wafer-level CSP, wafer-level fan-out, SWIFT and flip chip interconnect solutions and advanced SiP products. We continue to invest in developing the key processes and packaging and test technologies required for our customers to deliver advanced integrated and modular solutions to market. We are a leader in wafer thinning, micro-bumping, die stacking, hybrid packaging and TSV-based flip chip innovation. We are also a developer of environmentally friendly IC packaging, which involves the elimination of lead and certain other materials. Long-Standing Relationships and Collaboration with Prominent Semiconductor Companies Our customers include most of the world’s largest semiconductor companies, and over the last five decades we have developed long-standing relationships with many of these companies. We believe that our production excellence has been a key factor in our success in attracting and retaining customers. We work with our customers and our suppliers to develop proprietary process technologies to enhance our existing capabilities, reduce time-to-market, increase quality and lower costs. We believe that our focus on research and product development will enable us to enter new markets early, capture market share and promote the adoption of our new package designs as industry standards. We collaborate with customers and leading OEMs to develop comprehensive packaging solutions that make it easier for next-generation semiconductors to be designed into next-generation end products. By collaborating with leading semiconductor companies and OEM electronic companies, we gain access to technology roadmaps that allow us to focus resources on developing new packages that satisfy their future requirements. Broad Offering of Semiconductor Package Design, Packaging and Test Services Creating successful interconnect solutions for advanced semiconductor devices often poses unique thermal, electrical and mechanical design challenges, and we employ a large number of engineers to solve these challenges for a wide variety of products. This wide variety of packaging offerings is necessary to meet the diverse needs of our customers for the optimal combination of performance, size and cost attributes. Our solutions enable our customers to focus on semiconductor design and wafer fabrication while utilizing Amkor as their turnkey design, packaging and test services provider and, in many cases, their packaging technology innovator. We also offer an extensive line of advanced probe and final test services for analog, digital, logic, mixed signal and RF semiconductor devices. We believe that the breadth of our design, packaging and test services is important to customers seeking to limit the number of their suppliers. Geographically Diversified Operating Base We have a broad and geographically diversified operating footprint strategically located in seven countries in many of the world’s important electronics manufacturing regions. We believe that our scale and scope allow us to provide a flexible supply chain and cost-effective solutions to our customers by: • Offering capacity to absorb large orders and accommodate quick turn-around times; • Obtaining favorable pricing on materials and equipment, where possible, by using our purchasing power and leading industry position; • Qualifying production of customer devices at multiple manufacturing sites to mitigate the risks of supply disruptions; and • Providing capabilities and solutions for customer-specific requirements. Competitive Cost Structure and Disciplined Capital Investment There is a continuous push throughout the entire semiconductor supply chain for lower cost solutions. We work to maintain a competitive cost structure and make disciplined capital investment decisions so that we can provide cost-competitive solutions to our customers and achieve sustainable profitability and cash flow. Some of our cost control efforts have been directed at: (1) improving the utilization of our existing assets; (2) developing new manufacturing 7 Table of Contents methods to reduce processing costs; (3) utilizing flexible manufacturing lines that can accommodate a variety of products and customers; (4) increasing test densities to drive higher throughput; (5) implementing more cost-effective materials; (6) utilizing our scale to drive worldwide purchasing leverage; and (7) increasing labor productivity. We operate in a cyclical industry. During an industry downturn we seek to reduce our costs and drive greater factory and administrative efficiencies. Cost control efforts can include reducing labor costs by temporarily lowering compensation, reducing employee and contractor headcount, shortening work weeks and obtaining labor-related foreign government subsidies where available. PACKAGING AND TEST SERVICES In general, the semiconductor manufacturing process consists of IC design, wafer fabrication, wafer probe, packaging and final test. The packaging and test services we provide occur subsequent to wafer fabrication. The wafers that we receive from our customers are generally consigned to us; we do not own the consigned wafers or record their value in our financial statements. Advanced Products and Mainstream Products We offer a broad range of advanced and mainstream packaging and test services to our customers. We refer to our flip chip, wafer-level processing and related test services as “Advanced Products”, and our wirebond packaging and related test services as “Mainstream Products”. The following table sets forth, for the periods indicated, the amount of advanced and mainstream packaging and test net sales and the percentage of such net sales: For the Year Ended December 31, 2020 2019 2018 (In millions, except percentage of net sales) Advanced Products $ 3,202 63.4 % $ 2,111 52.1 % $ 2,118 49.1 % Mainstream Products 1,849 36.6 % 1,942 47.9 % 2,198 50.9 % Total net sales $ 5,051 100.0 % $ 4,053 100.0 % $ 4,316 100.0 % Advanced Products Our Advanced Products include flip chip chip scale packages, wafer-level packages and flip chip ball grid array packages. These package families use flip chip interconnect technology so that the die can be connected to a substrate package carrier or, in the case of wafer-level chip scale packages, directly to a printed circuit board. Flip Chip Chip Scale Package (“FC CSP”) Products : FC CSP packages are small form factor packages where the substrate size is not much larger than the die itself. The size advantage provided by CSP technologies has made FC CSP an attractive choice for a wide variety of applications that require very small form factors such as smartphones, tablets and other mobile consumer electronic devices. Flip chip stacked chip scale packages (“FC SCSP”) stack a second die on top of the original flip-chip die. The top die is typically a memory device, and wirebond interconnects are used to attach it to the substrate. FC SCSP is frequently used to stack memory on top of digital baseband and applications processors for use in mobile devices. We continue to drive thinner package solutions for our PoP technology through the development of ultra-thin substrates and enhancing our pre-stacking and thin die handling capabilities. We developed fine pitch copper pillar flip chip interconnect technology, which creates interconnections at finer pitches using a plating process to reduce the number of substrate layers to facilitate very thin packages. This innovative solution is also an enabling technology for package stacking with TSVs. Flip Chip Ball Grid Array (“FC BGA”) Products : FC BGA packages are large form factor substrate-based packages which are used where processing power and speed are needed and small form factors are not required. Our FC BGA packages are assembled around state-of-the-art substrates. Utilizing multiple high density routing layers, laser drilled vias, and ultra-fine line and space metallization, FC BGA substrates have the highest routing density available. The variety of FC BGA package options allows package selection to be tailored to the specific thermal needs of the end 8 Table of Contents product. We offer FC BGA packaging in a variety of product formats to fit a wide range of end application requirements, including networking, storage, computing and consumer applications. Wafer-level Package Products : We offer three types of wafer-level packages: Wafer-level CSP; wafer-level fan-out; and SWIFT. • Wafer-level CSP packages (also known as fan-in wafer-level packages) do not utilize a package carrier. The bumped wafer is singulated into individual die, and the wafer-level package is then attached directly to the system board. Wafer-level CSP offers one of the lowest total system costs, enabling higher semiconductor content while leveraging the smallest form factor and one of the highest performing, most reliable semiconductor package platforms on the market today. We have seen consistent content gains in our wafer-level CSP business, driven largely by mobile communications. Applications for wafer-level CSP include power management, transceivers, sensors, wireless charging, codecs and specialty silicon for new or unique functionality. • Wafer-level fan-out packages (also known as low-density fan-out packages) are utilized for ICs where the die surface area is too small to accommodate all of the bond pads. The fan-out package enlarges the bondable surface area by building a border around the die using low-cost molding compound. Wafer-level CSP and wafer-level fan-out are complementary technologies. Customers can choose between the two package types as their die sizes shrink or grow. With the acquisition of Nanium, we became a leader in low-density fan-out technology. • Silicon Wafer Integrated Fan-out Technology (“SWIFT”, also known as high-density fan-out) replaces a laminate substrate with a thinner structure. SWIFT solutions enable very thin, very small products combining application processors, memory, baseband and other peripheral ICs. Mainstream Products Our Mainstream Products include leadframe packages, substrate-based wirebond packages and MEMS packages. These package families use wirebond interconnect technology to connect a die to a leadframe or substrate package carrier. Leadframe Packages: Leadframe packages use wirebond or flip chip technology to interconnect a die to a leadframe package carrier. Leadframe packages are used in many electronic devices and remain the most practical and cost-effective solution for many low to medium pin count applications. Traditional leadframe packages support a wide variety of device types and applications. Two of our most popular traditional leadframe package types are small outline integrated circuit and quad flat package, commonly known as “dual” and “quad” products, respectively, based upon the number of sides from which the leads extend. The traditional leadframe package family has evolved from “through hole design,” where the leads are plugged into holes on the circuit board to “surface mount design,” where the leads are soldered to the surface of the circuit board. We offer a wide range of lead counts and body sizes to satisfy variations in the size of customers’ semiconductor devices. Through a process of continuous engineering and customization, we have designed several leadframe package types that are thinner and smaller than traditional leadframe packages and can accommodate more leads on the perimeter of the package. These leadframe packages typically have superior thermal and electrical characteristics, which allow them to dissipate heat generated by high-powered semiconductor devices while providing enhanced electrical connectivity. We are developing increasingly smaller versions of these packages to keep pace with continually shrinking semiconductor device sizes and demand for miniaturization of portable electronic products. One of our more successful leadframe package offerings is the Micro LeadFrame family of quad flat no lead packages. Power discrete devices use a leadframe as the package carrier and primarily use wirebond interconnect technology. However, power applications that require improved thermal and electrical performance will use packaging with copper clip interconnect technology. Substrate-based Wirebond Packages : Substrate-based wirebond packages use wirebond technology to connect a die to a substrate. Some of our packages in this category include stacked CSP, wirebond ball grid array packages and plastic ball grid array (“PBGA”) packages. 9 Table of Contents Stacked CSP technology enables the stacking of a wide range of different semiconductor devices to deliver high levels of silicon integration and area efficiency. Stacked CSP utilizes high density thin core substrates and advanced materials, along with leading-edge wafer thinning, die attach and molding capabilities, to stack multiple die on a substrate. Stacked CSP is ideal for memory and mixed signal applications. Wirebond ball grid array packages offer a broad selection of ball array pitches, ball counts and body sizes, single and multi-die layouts, stacked die and passive component integration. They are applicable for a wide range of semiconductors requiring a smaller package size than conventional PBGAs or leadframe packages. PBGA packages are used in applications requiring higher pin count than leadframe packages, but typically have lower pin counts than flip chip. PBGA packages are designed for low inductance, improved thermal operation and enhanced surface-mount technology ability. Custom performance enhancements, like ground and power planes, are also available. Micro-Electro-Mechanical Systems Packages : MEMS are miniaturized mechanical and electro-mechanical devices that can sense and provide information about the physical world and sometimes trigger a response. Examples of MEMS devices include microphones, accelerometers, airbag deployment sensors, gyrometers, magnetometers, and humidity, temperature and pressure sensors. We also specialize in sensor fusion products which utilize our cavity MEMS platform and combine multiple sensors into a single package. MEMS packages leverage our expertise in wafer thinning, die stacking, wirebonding and flip chip interconnect to deliver sophisticated products with a very small form factor. Advanced System-in-Package Modules Advanced SiP modules combine multiple semiconductor and other electronic components with different functionalities into a single package. These modules use wirebond, flip chip or wafer-level interconnect technologies. Components can include integrated circuits, passive devices (inductors, capacitors, resistors, filters and diplexers), antennas and mechanical parts. The increasing demand for miniaturization and higher functionality at competitive cost is driving the adoption of advanced SiP in new products. Advanced SiP modules are used for many applications such as RF and front end modules, basebands, connectivity, fingerprint sensors, display and touch screen drivers, sensors and MEMS, NAND memory and solid state drives. Advanced SiP modules are found in many products including smartphones and tablets, automobiles, IoT wearables, high-performance gaming systems, computers and network systems. In 2020, 2019 and 2018, we had net sales of approximately $1,885 million, $1,075 million and $990 million, respectively, from our advanced SiP modules which are included in either Advanced Products or Mainstream Products depending upon the interconnect technology used in the module. End Markets The following table lists the end markets that use our products and sets forth, for the periods indicated, the percentage of net sales in each end market. 2020 2019 2018 End Market Distribution Data (an approximation including representative devices and applications based on a sampling of our largest customers): Communications (handheld devices, smart phones, tablets) 41 % 38 % 44 % Consumer (connected home, set-top boxes, televisions, visual imaging, wearables) 24 % 18 % 12 % Automotive, industrial and other (driver assist, infotainment, performance, safety) 20 % 27 % 26 % Computing (datacenter, infrastructure, PC/laptops, storage) 15 % 17 % 18 % Total net sales 100 % 100 % 100 % RESEARCH AND DEVELOPMENT Our research efforts focus on developing new packaging solutions and test services, as well as improving the efficiency and capabilities of our existing production processes. We believe that technology development is one of the keys to success in the semiconductor packaging and test industry. By concentrating our research and development on our 10 Table of Contents customers’ needs for innovative packages, increased performance and lower cost, we gain opportunities to enter markets early, capture market share and promote our new package offerings as industry standards. One of our top priorities is developing highly integrated modules for the next generation of mobile devices, which reduce material and processing costs and minimize form factor. This development effort is particularly important for customers requiring miniaturization of high performance functionality in the mobile phone and consumer markets. Another important focus area is the development of wafer-level packages for larger chips. These wafer-level chip-scale packages and wafer-level fan-out (low density) packages are increasingly the preferred package type for many chips used in mobile devices. They provide a very low-profile product at a competitive cost. We are also developing new applications for the automotive market using existing and new package technologies as higher performance compute and sensor content are used to support new automotive features including ADAS, infotainment and electric vehicles. Another focus for development is in the area of integrated multi-die solutions, including higher density MCMs and wafer-level fan-out solutions which enable package level integration of different types and levels of silicon technologies. This is accomplished by combining application processors and other chiplets into one packaged module. Through the use of die partitioning and heterogeneous die integration, these modules provide higher functionality at lower total product cost. Our research and development employees are based in Korea, the United States, Portugal and throughout other parts of Asia. In 2020, we had approximately 650 employees engaged in research and development activities. In 2020, 2019 and 2018, we incurred $140.7 million, $137.6 million and $157.2 million, respectively, of research and development expense. SALES AND MARKETING Our sales offices are located throughout Asia, Europe and North America. Our support personnel manage and promote our packaging and test services and provide key customer and technical support. To provide comprehensive sales and customer service, we typically assign our customers a direct support team consisting of an account manager, technical program manager, test program manager and both field and factory customer support representatives. We also support our largest multinational customers from multiple office locations to ensure that we are aligned with their global operational and business requirements. Our direct support teams are further supported by an extended staff of product, process, quality and reliability engineers, as well as marketing and advertising specialists, information systems technicians and factory personnel. Together, these direct and extended support teams deliver an array of services to our customers. SEASONALITY Our sales have generally been higher in the second half of the year than in the first half due to the effect of consumer buying patterns in the U.S., Europe and Asia and the timing of flagship mobile device launches. In addition, semiconductor companies generally reduce their production during the holidays at the end of December, which generally results in a decrease in packaging and test services during the first quarter. General economic conditions, changes in our product mix or overall demand in any of our end-markets can impact our seasonality. CUSTOMERS In 2020, we had approximately 250 customers, including many of the largest semiconductor companies in the world. Our ten largest customers accounted for 65% of our net sales in 2020. Direct sales to Apple Inc., our largest customer, increased during 2020 and accounted for 14.5% of our net revenue for the year ended December 31, 2020. MATERIALS AND EQUIPMENT Materials Our materials are used primarily for packaging activities. Our packaging operations depend upon obtaining adequate supplies of materials on a timely basis. The principal materials used in our packaging process are leadframes, laminate substrates, gold and copper wire, mold compound, epoxy, tubes and trays. The silicon wafer is generally consigned from the customer. We generally do not take ownership of the customer consigned wafer, and title and risk of loss remains with the customer for these materials. Test materials constitute a very small portion of our total test cost. We purchase 11 Table of Contents materials based on customer forecasts, and our customers are generally responsible for any unused materials which we purchased based on such forecasts. We obtain the materials required for packaging services from various suppliers. We source most of our materials, including critical materials such as leadframes, laminate substrates and gold wire, from a limited group of suppliers. We work closely with our primary material suppliers in an effort to ensure consistent quality, availability and timely delivery. We also negotiate worldwide pricing agreements with our major suppliers to take advantage of the scale of our operations. Equipment Our ability to meet the changing demand from our customers for manufacturing capacity depends upon obtaining packaging and test equipment in a timely manner. We work closely with our main equipment suppliers to coordinate the ordering and delivery of equipment to meet our expected capacity needs. The primary types of equipment used in providing our packaging services are wirebonders and die bonders. In addition, we maintain a variety of other packaging equipment, including mold, singulation, die attach, ball attach and wafer backgrind, along with numerous other types of manufacturing equipment. A substantial portion of our packaging equipment base can generally be used and adapted to support the manufacture of many of our packages through the use of relatively low cost tooling, although equipment used in advanced packaging can be more difficult to redeploy than equipment used in traditional wirebond packaging. We also purchase wafer bumping equipment to facilitate our flip chip and wafer level packaging services. Wafer bump equipment includes sputter and spin coaters, electroplating equipment, reflow ovens and other types of equipment. This equipment tends to have longer lead times for delivery and installation than other packaging equipment and is sold in relatively larger increments of capacity. The primary equipment used in the testing process includes testers, handlers and probers. Handlers are used to transfer individual or small groups of packaged ICs to a tester. Test equipment is generally a more capital intensive portion of the process and tends to have longer delivery lead times than most types of packaging equipment. We focus our capital expenditures on standardized tester platforms in order to maximize test equipment utilization where possible. In some cases, our customers will consign test equipment to us. In those cases, we operate the equipment on their behalf but do not own it. GOVERNMENTAL REGULATIONS As a public company with global operations, we are subject to various federal, state, local, and foreign laws and our products and services are governed by a number of rules and regulations. These regulations, which differ among jurisdictions, include those related to financial and other disclosures, accounting standards, environmental, corporate governance, intellectual property, tax, trade, antitrust, employment, immigration and travel regulations, privacy, and anti-corruption. Costs and accruals incurred to comply with these governmental regulations are presently not material to our capital expenditures, results of operations and competitive position. Although there is no assurance that existing or future government laws applicable to our operations, services or products will not have a material adverse effect on our capital expenditures, results of operations and competitive position, we do not currently anticipate material expenditures for compliance with government regulations. Environmental Matters We use chemicals and materials in the semiconductor packaging process that generate byproducts such as wastewater, solid waste and flue gas. For example, water used for rinsing or cooling wafers being sawed or used in the etching or solder deposition process produces wastewater. Scraps from metal lead-frame or substrate or excessive molding resin produces solid waste. Emissions from solvents used for coating produce flue gases. In addition to byproducts, semiconductor packages have historically contained lead (“Pb”), a naturally occurring element that can be toxic. The use of Pb in our packages has decreased over time due to the use of Pb-free alternatives. The use and storage of chemicals and materials are subject to various laws and regulations governing waste disposal, water discharge, emissions into the atmosphere and employee health and safety. We are engaged in continuing efforts to comply with these environmental laws and regulations, including the establishment of Environmental Management Systems, safety training for employees and installation of pollution control equipment at our factories. 12 Table of Contents In the future we may be subject to changes to existing environmental regulations or new green initiatives required by our customers, investors or other stakeholders. We do not believe that capital expenditures or other costs attributable to compliance with environmental laws and regulations or green initiatives will have a material adverse effect on our business, liquidity, results of operations, financial condition or cash flows. We are also committed to responsible environmental practices that go beyond legal requirements in conducting our business. These environmental practices include: • Certification of our factories worldwide to International Organization for Standards (“ISO”) framework 14001, widely recognized as the standard for effective Environmental Management Systems. • Measurement and independent verification of greenhouse gases (“GHG”) generated by our factories worldwide. Once collected, our GHG data is submitted to, and disclosed publicly by, the CDP, formerly known as the Carbon Disclosure Project. CDP is a leading organization that assesses the impact of climate change and promotes a sustainable economy. • Membership in the Responsible Business Alliance (“RBA”), an international industry group dedicated to corporate social responsibility. RBA members agree to follow a uniform Code of Conduct that includes standards of environmental responsibility, and our factories have been subject to independent audits to assess compliance with these standards. • Capital investment and process optimization activities to reduce GHGs include installation of solar photovoltaic panels, replacement of or improvements to chiller unit systems and use of lighting based on Light Emitting Diode (“LED”) technology. COMPETITION The outsourced semiconductor packaging and test market is very competitive. We face substantial competition from established packaging and test service providers primarily located in Asia, including companies with significant manufacturing capacity, financial resources, research and development operations, marketing and other capabilities. These companies include ASE Technology Holding Co., Ltd. and JCET Group Co., Ltd. Such companies also have developed relationships with most of the world’s largest semiconductor companies, including current or potential customers of Amkor. We also compete with the internal semiconductor packaging and test capabilities of many of our customers. Our IDM customers continually evaluate the attractiveness of outsourced services against their own in-house packaging and test services and at times may decide to shift some or all of their outsourced packaging and test services to internally sourced capacity. We also compete with contract foundries, such as Taiwan Semiconductor Manufacturing Company Limited and Samsung Electronics Co., Ltd., which offer full turnkey services from silicon wafer fabrication through packaging and final test. In addition, we compete with companies that offer only test services and not packaging. The principal elements of competition in the semiconductor packaging and test services market include: • technical competence; • quality; • price; • breadth of packaging and test services offered, including turnkey services; • new package and test design, technology innovation and implementation; • cycle times; • customer service; • available capacity; and • ability to invest in capacity, geographic location and scale of manufacturing. 13 Table of Contents We believe that we compete favorably with respect to each of these elements. INTELLECTUAL PROPERTY We maintain an active program to protect and derive value from our investment in technology and the associated intellectual property rights. Intellectual property rights that apply to our various products and services include patents, copyrights, trade secrets and trademarks. We have filed and obtained a number of patents in the U.S. and abroad, and their durations vary depending on the jurisdiction in which each patent is filed. Although our patents are an important element of our intellectual property strategy as a whole, we are not materially dependent on any one patent or any one technology. We expect to continue to file patent applications when appropriate to protect our proprietary technologies, but we cannot assure you that we will receive patents from pending or future applications. In addition, any patents we obtain may be challenged, invalidated or circumvented and may not provide meaningful protection or other commercial advantage to us. We also protect and maintain the confidentiality of certain information about our processes, products and strategies which we believe provides us with a competitive advantage. We have ongoing programs designed to maintain the confidentiality of such information. As part of these efforts, all employees who have access to Amkor’s information systems are required to participate in cybersecurity training within the first 14 days of employment, after which recurring mandatory training is required on an annual basis. Further, to distinguish our products from our competitors’ products, we have obtained certain trademarks and service marks and may promote our particular brands through advertising and other marketing techniques. HUMAN CAPITAL RESOURCES Employees As of December 31, 2020, Amkor employed 29,050 regular full-time employees, of whom approximately 97%, 2% and 1% resided in the Asia-Pacific region, Europe and North America, respectively. Our global workforce spans 11 countries, reflecting various cultures, backgrounds, ages, genders and ethnicities. Of our global employee base, 91% are employed in manufacturing roles. Our employees in the Philippines, Singapore, Taiwan and the U.S. are not represented by any union. Certain employees at our factories in China, Japan, Korea, Malaysia and Portugal are members of a union, and we operate subject to collective bargaining agreements that we have entered into with these unions. We believe that our relations with our employees are good, and we have not experienced a work stoppage in any of our factories. Amkor believes that its future success is highly dependent upon our continued ability to attract, retain and motivate qualified employees. As part of our effort to attract and motivate employees, Amkor is committed to providing comprehensive benefit options that are intended to allow our employees and their families to live healthier and more secure lives. Additionally, Amkor has implemented various retention programs at factory locations to incentivize and retain high-performing employees. Factory locations also maintain training and development programs that enable the continued learning and growth of our employees, and senior management regularly meets to share and implement best practices among our various facilities. We believe that our efforts to motivate and retain qualified employees is reflected in the long average tenure of our key employees. Additionally, we strive to promote our management-level employees from within Amkor and believe that we have been successful in this effort. Health and Safety The health and safety of our employees is very important to us and, accordingly, we endeavor to provide comprehensive health benefits to all of our full-time employees. Our focus on health and safety is further evident in our response to the Covid-19 pandemic around the globe. Because our business involves the manufacturing and testing of physical products, many of our employees are unable to work from home. In an effort to keep our employees safe and to maintain operations during the Covid-19 pandemic, we implemented a number of new health and safety-related measures during 2020. Actions taken at Amkor’s facilities during the pandemic include: • Establishing a response team with executive sponsors; • Adopting a “no factory visit” policy; 14 Table of Contents • Implementing a work from home environment in all U.S. locations, and certain international locations; • Implementing extraordinary travel restrictions across the Company, including 14-day waiting periods for entry to Amkor factories after international travel; • Communicating with employees about health and safety measures and educating employees about the outbreak; • Arranging for alternative housing for employees in China who traveled; • Screening everyone at campus entrances for fever and signs of illness; • Increasing hygiene measures at dormitories, canteens and shuttles; • Requiring masks to be worn and the use of disinfectants for hand washing; • Implementing protocols to address actual and suspected Covid-19 cases and potential exposure; and • Restricting domestic and international non-essential travel for all employees.