What changed in this filing

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Item 1. Business

2021-02-19 compared with 2020-02-19 · 84 added, 95 removed, 319 unchanged (36% of the section changed)

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The SEC’s website is http://www.sec.gov .

Amkor’s website is https://www.amkor.com.

Amkor’s website is http://www.amkor.com.

Amkor makes available, free of charge, through its website:

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Forms 3, 4 and 5 filed on behalf of directors and executive officers and any amendments to those reports filed or furnished pursuant to the Securities Exchange Act of 1934, as amended (the “Exchange Act”), as soon as reasonably practicable after such material is electronically filed with, or furnished to, the SEC.

We also make available, free of charge, through our website, our Corporate Governance Guidelines, the charters of the Audit Committee, Nominating and Governance Committee and Compensation Committee of our Board of Directors, our Code of Business Conduct, our Code of Ethics for Directors and other information and materials.

We also make available, free of charge, through our website, our

Corporate Governance Guidelines, the charters of the Audit Committee, Nominating and Governance Committee and Compensation Committee of our Board of Directors, our Code of Business Conduct, our Code of Ethics for Directors and other information and materials.

The information on Amkor’s website is not incorporated by reference into this report.

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These trends include:

An increasing demand for mobile and connected devices, including the world-wide adoption of “smart” phones, tablets and other Internet-of-Things (IoT) devices that can access the internet and provide multimedia capabilities.

• An increasing demand for mobile and connected devices, including the worldwide adoption of “smart” phones, tablets and other Internet-of-Things (IoT) devices that can access the internet and provide multimedia capabilities.

• An increase in mobility and connectivity capabilities and growing digital content driving demand for new broadband wired and wireless networking equipment.

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• The emergence of specialized chips designed to collect, analyze and store the digital content driven by the growth of cloud computing.

These chips include data accelerators, artificial intelligence and machine learning devices.

These chips, sometimes referred to as “chiplets,” include data accelerators, artificial intelligence and machine learning devices.

The semiconductor industry is adopting a chiplet based approach to reduce the overall cost, improve the individual yields and deliver required performance.

In this type of packaging, diverse dies of different geometries are positioned close to each other within the same package.

• The growth of advanced System-in-Package (“SiP”) modules where multiple semiconductor and other electronic components with different functionalities are combined into a single package.

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Advanced SiPs are the primary vehicle for package-level integration, which allow customers to combine integrated circuits (“ICs”) from different silicon nodes and different foundries.

As a supplier in the semiconductor industry, our business is cyclical by nature and impacted by broad economic factors, such as world-wide gross domestic product and consumer spending.

Historical trends indicate there has been a strong correlation between world-wide gross domestic product levels, consumer spending and semiconductor industry cycles.

As a supplier in the semiconductor industry, our business is cyclical by nature and impacted by broad economic factors, such as worldwide gross domestic product and consumer spending.

Historical trends indicate there has been a strong correlation between worldwide gross domestic product levels, consumer spending and semiconductor industry cycles.

Outsourcing Trends in Semiconductor Manufacturing

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This trend has led many semiconductor companies and OEMs to view packaging and test as enabling technologies requiring the kind of leading-edge expertise for technological innovation found in the leading outsourced assembly and test companies.

At the same time, these companies are often looking to reduce the internal manufacturing and research and development costs in packaging and test.

At the same time, these companies are often looking to reduce the internal manufacturing and research and development costs in packaging and test solutions.

As a result, many of these companies are increasingly relying on packaging and test service providers as key sources for new package designs and advanced interconnect technologies.

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The semiconductor industry is cyclical by nature and impacted by broad economic factors, such as changes in worldwide gross domestic product and consumer spending.

Semiconductor packaging and test are complex processes requiring substantial investment in specialized equipment, factories and human resources.

Semiconductor packaging and test are complex processes requiring substantial investment in specialized equipment, factories and human capital.

As a result of this cyclicality and the large investments required, manufacturing facilities must operate at consistently high levels of utilization to be cost-effective.

Shorter product life cycles, coupled with the need to update or replace packaging and test equipment to accommodate new package types, make it more difficult for integrated semiconductor companies to maintain cost-effective utilization of their packaging and test assets throughout semiconductor industry cycles.

Packaging and test service providers, on the other

hand, can typically use their assets to support a broad range of customers and multiple end markets, potentially generating more efficient use of their production assets and a more cost-effective solution.

Packaging and test service providers, on the other hand, can typically use their assets to support a broad range of customers and multiple end markets, potentially generating more efficient use of their production assets and a more cost-effective solution.

Packaging and test service providers can facilitate a more efficient supply chain and help shorten time-to-market for new products.

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The high cost of investing in next generation silicon technology and equipment is causing many semiconductor companies to adopt or maintain a “fabless” or “fab-lite” strategy to reduce or eliminate their investment in wafer fabrication and associated packaging and test operations.

As a result, these companies are increasing their reliance on outsourced providers of semiconductor manufacturing services, including packaging and test.

As a result, these companies are increasing their reliance on outsourced providers of semiconductor manufacturing services, including packaging and test solutions.

STRATEGY AND COMPETITIVE STRENGTHS

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We are an industry leader in developing and commercializing cost-effective advanced packaging and test technologies.

These advanced technology solutions provide increased value to our customers.

We believe these advanced technology solutions provide increased value to our customers.

An important factor for success in the advanced packaging and test area is to generate reasonably quick returns on investments made in support of customers seeking leading-edge technologies.

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We work closely with our customers to develop cost-effective leading-edge packages for the next generation of devices.

These include integrated technologies such as advanced SiP, wafer-level fan-out, Silicon Wafer Integrated Fan-out Technology (“SWIFT”), High Density Fan-Out (“HDFO”) and redistribution layer (“RDL”) solutions which enable very thin, very small products combining application processors, memory, baseband and other peripheral integrated circuits (“ICs”).

These include integrated technologies such as advanced SiP, wafer-level fan-out, Silicon Wafer Integrated Fan-out

Technology (“SWIFT”), High Density Fan-Out (“HDFO”) and redistribution layer (“RDL”) solutions which enable very thin, very small products combining application processors, memory, baseband and other peripheral integrated circuits (“ICs”).

They also include packages utilizing TSV interconnects and silicon interposers which enable the integration of high-performance chips such as high bandwidth memory and graphics processors into a single package.

We believe that advanced packaging services will continue to grow as our customers and leading electronics OEMs strive for smaller device geometries, higher levels of speed and performance and lower power consumption.

We intend to continue to leverage our investment in advanced technology to meet the demand for these services.

Our approach is to work with lead customers to develop processes that will enable volume manufacturing with high yields and reliability.

We believe that advanced packaging services will continue to grow as our customers and leading electronics OEMs strive for smaller device geometries, higher levels of integration and performance and lower power consumption.

We intend to continue to leverage our investment in advanced technology to meet the demand for these services in high growth markets.

Improve Utilization of Existing Assets and Broaden Our Customer Base

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Our balanced growth strategy consists of the following two components:

First, we are increasing our revenue in markets beyond communications, including automotive, consumer and computing end markets.

• First, we are increasing our revenue in markets beyond communications, including consumer, computing and automotive and industrial end markets.

As computing power increases in additional applications, these additional markets are requiring more advanced packaging technology.

Revenue from these markets tends to be more stable, with less pronounced seasonality tied to the launch of flagship phones.

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We believe that this acquisition has strengthened our position in the market for wafer-level packaging.

In 2015, we completed the acquisition of 100% of J-Devices, our outsourced semiconductor assembly and test (“OSAT”) joint venture in Japan.

We believe that selective growth through joint ventures, acquisitions and other strategic investments can help diversify our revenue streams, improve our profits and maintain our technological leadership.

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We have designed and developed several state-of-the-art package formats and technologies, including our Package-on-Package (“PoP”) platform with Through Mold Via (“TMV”) technology, molded embedded packages, FusionQuad, flip chip ball grid array, multi-chip modules with a silicon interposer placed between the module chips and substrate, copper pillar bumping and fine pitch copper pillar flip chip packaging technologies.

In addition, we believe that as semiconductor technology continues to achieve smaller device geometries with higher levels of speed and performance, packages will increasingly require wafer-level CSP, wafer-level fan-out, SWIFT and flip chip interconnect solutions and advanced SiP products.

In addition, we believe that as semiconductor

technology continues to achieve smaller device geometries with higher levels of integration, speed and performance, packages will increasingly require wafer-level CSP, wafer-level fan-out, SWIFT and flip chip interconnect solutions and advanced SiP products.

We continue to invest in developing the key processes and packaging and test technologies required for our customers to deliver advanced integrated and modular solutions to market.

We are a leader in wafer thinning, micro-bumping, die stacking,

hybrid packaging and TSV-based flip chip innovation.

We are a leader in wafer thinning, micro-bumping, die stacking, hybrid packaging and TSV-based flip chip innovation.

We are also a developer of environmentally friendly IC packaging, which involves the elimination of lead and certain other materials.

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(1) improving the utilization of our existing assets;

(2) developing new manufacturing methods to reduce processing costs;

(2) developing new manufacturing

methods to reduce processing costs;

(3) utilizing flexible manufacturing lines that can accommodate a variety of products and customers;

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(5) implementing more cost-effective materials;

(6) utilizing our scale to drive world-wide purchasing leverage;

(6) utilizing our scale to drive worldwide purchasing leverage;

and (7) increasing labor productivity.

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PACKAGING AND TEST SERVICES

Overview of Semiconductor Manufacturing Process

In general, the semiconductor manufacturing process consists of IC design, wafer fabrication, wafer probe, packaging and final test.

Integrated circuit design involves the laying out of electronic components, such as transistors, resistors, capacitors and the metallic interconnect of these components, to achieve the desired device functionality.

Wafer fabrication is a multiple-step sequence of photolithographic and chemical processing steps during which the ICs are gradually created on semiconductor material, typically a silicon wafer.

Individual ICs are generally known as a “chip” or “die”, and a single wafer will contain many die.

Wafers are fabricated by two types of companies - IDMs, which design and fabricate wafers using their own in-house manufacturing facilities, and contract foundries, which manufacture wafers that are designed by fabless companies or other customers.

Excluding the vertically integrated memory market, contract foundries account for the majority of leading edge wafer processing technology manufacturing digital semiconductor products.

The packaging and test services we provide occur subsequent to wafer fabrication.

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we do not own the consigned wafers or record their value in our financial statements.

During wafer probe, each individual die is electrically tested, or probed, for defects so that only good die are packaged.

Packaging is the processing of bare die to facilitate electrical connections and heat dissipation and protect the die.

The wafer is separated into individual die.

Each good die is then assembled into a package that typically encapsulates the die for protection and creates the electrical connections used to connect the package to a printed circuit board, module or other part of the electronic device.

In some packages, chips are attached to a substrate or leadframe carrier through wirebonding or flip chip interconnects and then encased in a protective material.

Or, for a wafer-level package, the electrical interconnections are created directly on the surface of the die so that the chip may be attached directly to other parts of an electronic device without a substrate or leadframe.

The packages are then tested using sophisticated equipment to ensure that each packaged chip meets its design and performance specifications.

Packaging and Test Technologies and Processes

Our packages employ wirebond, flip chip, copper clip and other interconnect technologies.

We use leadframe and substrate package carriers, and we perform a variety of test services.

Interconnect Technologies

In packages that employ wirebond interconnect technology, the die is mounted face up on the package carrier and the interconnections between the die and package carrier are made through very fine gold, silver or copper wires which are attached from the bond pads of the die to the package carrier.

The interconnections are placed along the perimeter of the die.

Wirebonding is generally considered to be the most cost-effective and flexible interconnect technology and is used to assemble the majority of semiconductor packages.

In packages that employ flip chip interconnect technology, the interconnections between the die and package carrier are made through conductive “bumps” that are placed directly on the die surface utilizing a process called wafer bumping.

The bumped die is then “flipped over” and placed face down, with the bumps connecting directly to the package carrier.

Flip chip allows a higher number of interconnects than wirebond as it uses the entire surface area of the die, and sometimes the perimeter as well, instead of just the perimeter as used by most wirebond packages.

Flip chip also provides enhanced thermal and electrical performance and enables smaller die and thinner, smaller form factors (or physical package dimensions).

The wafer bumping process consists of preparing the wafer for bumping and forming or placing the bumps.

Preparation may include cleaning, removing insulating oxides and providing a pad metallurgy that will protect the interconnections while making good mechanical and electrical connection between the bump and the wafer.

Copper Clip :

Copper clip interconnect technology uses a solid copper bridge or “clip” to connect the die to the package carrier.

The clip allows a higher level of current flow than a wire and also provides a better method of heat transfer from the die.

The clip is either spot welded, or more often re-flow soldered, to the die pads and the package carrier pads.

Package Carriers

A leadframe is a miniature sheet of metal, generally made of copper and silver alloys, on which a pattern of electrical connections (or “leads”) has been cut.

The leads are generally placed around the perimeter of the leadframe and are used to connect the package to the system board.

The number of leads on an individual leadframe is limited as electrical shorting can occur if the leads are placed too close together.

A substrate is a laminate of either single or multiple layers of epoxy resin, woven glass fibers and metal conductors.

Solder bumps provide the electrical connection to the system board.

The bumps are typically distributed evenly across the bottom surface of the substrate (called a “ball grid array” format).

This allows less distance between individual leads and a higher number of interconnects than leadframe packages.

Test Services

Amkor provides a complete range of semiconductor testing services including wafer testing or probe and final test.

We offer a broad range of test software, hardware, integration and product engineering services, and we support a range of business models and test capabilities.

Substantially all of our test business is derived from testing packages that we assemble.

Wafer Test Services:

Wafer test, also referred to as wafer probe, is performed after wafer fabrication or wafer bumping to screen out defective devices prior to packaging.

We offer a range of wafer test coverage that can be tailored based on the cost and complexity of the die, the package and the product.

These services range from coarse level screening for major defects all the way up to probing at high digital speeds and can include full radio frequency transmit and receive as well as testing at multiple temperatures.

Wafer testing can also involve a range of wafer mapping and inspection operations.

Final Test Services:

After the packaging process, final test is performed to ensure that the packaged device meets the customer’s requirements.

Final test spans a range of rigor and complexity depending on the device and end market application.

More rigorous types of final test include testing multiple times under different electrical and temperature conditions and before and after device reliability stresses, such as burn-in.

In addition to electrical testing, specialized solutions are required for packages that also process non-electric stimuli.

The electrical tests are a mix of functional, structural and system-level tests depending on the customer’s requirements and cost and reliability parameters.

The electrical test equipment we use includes commercially available automated test equipment, customized and proprietary system level test equipment and innovative types of low cost test equipment developed by Amkor.

Advanced Products and Mainstream Products

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For the Year Ended December 31,

2020 2019 2018

(In millions, except percentage of net sales)

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Utilizing multiple high density routing layers, laser drilled vias, and ultra-fine line and space metallization, FC BGA substrates have the highest routing density available.

The variety of FC BGA package options allows package selection to be tailored to the specific thermal needs of the end product.

The variety of FC BGA package options allows package selection to be tailored to the specific thermal needs of the end

We offer FC BGA packaging in a variety of product formats to fit a wide range of end application requirements, including networking, storage, computing and consumer applications.

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Advanced SiP modules are used for many applications such as RF and front end modules, basebands, connectivity, fingerprint sensors, display and touch screen drivers, sensors and MEMS, NAND memory and solid state drives.

Advanced SiP modules are found in many products including smartphones and tablets, automobiles, wearable electronics, high-performance gaming systems, computers and network systems.

Advanced SiP modules are found in many products including smartphones and tablets, automobiles, IoT wearables, high-performance gaming systems, computers and network systems.

In 2020, 2019 and 2018, we had net sales of approximately $1,885 million, $1,075 million and $990 million, respectively, from our advanced SiP modules which are included in either Advanced Products or Mainstream Products depending upon the interconnect technology used in the module.

The following table lists the end markets that use our products and sets forth, for the periods indicated, the percentage of net sales in each end market.

All prior periods have been retrospectively recast to conform with current year presentation.

2020 2019 2018

End Market Distribution Data (an approximation including representative devices and applications based on a sampling of our largest customers):

Communications (handheld devices, smart phones, tablets) 41 % 38 % 44 %

Automotive, industrial and other (driver assist, infotainment, performance, safety)

Consumer (connected home, set-top boxes, televisions, visual imaging, wearables) 24 % 18 % 12 %

Computing (data center, infrastructure, PC/laptops, storage)

Automotive, industrial and other (driver assist, infotainment, performance, safety) 20 % 27 % 26 %

Computing (datacenter, infrastructure, PC/laptops, storage) 15 % 17 % 18 %

Total net sales 100 % 100 % 100 %

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We believe that technology development is one of the keys to success in the semiconductor packaging and test industry.

By concentrating our research and development on our customers’ needs for innovative packages, increased performance and lower cost, we gain opportunities to enter markets early, capture market share and promote our new package offerings as industry standards.

One of our top priorities is developing low-cost packaging solutions for the next generation of mobile devices, which minimize material and processing costs, while maximizing yields and reliability.

This development effort is particularly important for customers seeking cost-effective alternatives to further silicon-level integration.

By concentrating our research and development on our

customers’ needs for innovative packages, increased performance and lower cost, we gain opportunities to enter markets early, capture market share and promote our new package offerings as industry standards.

One of our top priorities is developing highly integrated modules for the next generation of mobile devices, which reduce material and processing costs and minimize form factor.

This development effort is particularly important for customers requiring miniaturization of high performance functionality in the mobile phone and consumer markets.

Another important focus area is the development of wafer-level packages for larger chips.

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They provide a very low-profile product at a competitive cost.

We are also developing integrated (high density) wafer-level fan-out solutions called SWIFT which enable very thin, very small products by combining application processors, memory, baseband and other peripheral ICs into one packaged module.

Through the use of die partitioning and heterogeneous die integration, these sub-system and system modules provide higher functionality at lower cost versus multi-package options.

Many of the innovations developed for mobile devices migrate to other end markets, as customers in other end markets have similar challenges regarding miniaturization, power management and performance.

Our research and development employees are located in the United States and Portugal and throughout Asia.

We are also developing new applications for the automotive market using existing and new package technologies as higher performance compute and sensor content are used to support new automotive features including ADAS, infotainment and electric vehicles.

Another focus for development is in the area of integrated multi-die solutions, including higher density MCMs and wafer-level fan-out solutions which enable package level integration of different types and levels of silicon technologies.

This is accomplished by combining application processors and other chiplets into one packaged module.

Through the use of die partitioning and heterogeneous die integration, these modules provide higher functionality at lower total product cost.

Our research and development employees are based in Korea, the United States, Portugal and throughout other parts of Asia.

In 2020, we had approximately 650 employees engaged in research and development activities.

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Our ten largest customers accounted for 65% of our net sales in 2020.

Direct sales to Apple Inc., our largest customer, increased during 2020 and accounted for 14.5% of our net revenue for the year ended December 31, 2020.

MATERIALS AND EQUIPMENT

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Test materials constitute a very small portion of our total test cost.

We purchase materials based on customer forecasts, and our customers are generally responsible for any unused materials which we purchased based on such forecasts.

materials based on customer forecasts, and our customers are generally responsible for any unused materials which we purchased based on such forecasts.

We obtain the materials required for packaging services from various suppliers.

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We work closely with our primary material suppliers in an effort to ensure consistent quality, availability and timely delivery.

We also negotiate world-wide pricing agreements with our major suppliers to take advantage of the scale of our operations.

We also negotiate worldwide pricing agreements with our major suppliers to take advantage of the scale of our operations.

Our ability to meet the changing demand from our customers for manufacturing capacity depends upon obtaining packaging and test equipment in a timely manner.

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In those cases, we operate the equipment on their behalf but do not own it.

GOVERNMENTAL REGULATIONS

As a public company with global operations, we are subject to various federal, state, local, and foreign laws and our products and services are governed by a number of rules and regulations.

These regulations, which differ among jurisdictions, include those related to financial and other disclosures, accounting standards, environmental, corporate governance, intellectual property, tax, trade, antitrust, employment, immigration and travel regulations, privacy, and anti-corruption.

Costs and accruals incurred to comply with these governmental regulations are presently not material to our capital expenditures, results of operations and competitive position.

Although there is no assurance that existing or future government laws applicable to our operations, services or products will not have a material adverse effect on our capital expenditures, results of operations and competitive position, we do not currently anticipate material expenditures for compliance with government regulations.

Environmental Matters

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CDP is a leading organization that assesses the impact of climate change and promotes a sustainable economy.

Membership in the Responsible Business Alliance (“RBA”), formerly known as the Electronic Industry Citizenship Coalition, an international industry group dedicated to corporate social responsibility.

• Membership in the Responsible Business Alliance (“RBA”), an international industry group dedicated to corporate social responsibility.

RBA members agree to follow a uniform Code of Conduct that includes standards of environmental responsibility, and our factories have been subject to independent audits to assess compliance with these standards.

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We face substantial competition from established packaging and test service providers primarily located in Asia, including companies with significant manufacturing capacity, financial resources, research and development operations, marketing and other capabilities.

companies include ASE Technology Holding Co., Ltd.

and Jiangsu Changjiang Electronics Technology Co., Ltd.

These companies include ASE Technology Holding Co., Ltd.

and JCET Group Co., Ltd.

Such companies also have developed relationships with most of the world’s largest semiconductor companies, including current or potential customers of Amkor.

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• new package and test design, technology innovation and implementation;

• cycle times;

• customer service;

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We have ongoing programs designed to maintain the confidentiality of such information.

As part of these efforts, all employees who have access to Amkor’s information systems are required to participate in cybersecurity training within the first 14 days of employment, after which recurring mandatory training is required on an annual basis.

Further, to distinguish our products from our competitors’ products, we have obtained certain trademarks and service marks and may promote our particular brands through advertising and other marketing techniques.

In 2019 , Amkor had approximately 29,650 full-time employees.

We believe that our relations with our employees are good, and we have not experienced a work stoppage in any of our factories.

HUMAN CAPITAL RESOURCES

As of December 31, 2020, Amkor employed 29,050 regular full-time employees, of whom approximately 97%, 2% and 1% resided in the Asia-Pacific region, Europe and North America, respectively.

Our global workforce spans 11 countries, reflecting various cultures, backgrounds, ages, genders and ethnicities.

Of our global employee base, 91% are employed in manufacturing roles.

Our employees in the Philippines, Singapore, Taiwan and the U.S.

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Certain employees at our factories in China, Japan, Korea, Malaysia and Portugal are members of a union, and we operate subject to collective bargaining agreements that we have entered into with these unions.

We believe that our relations with our employees are good, and we have not experienced a work stoppage in any of our factories.

Amkor believes that its future success is highly dependent upon our continued ability to attract, retain and motivate qualified employees.

As part of our effort to attract and motivate employees, Amkor is committed to providing comprehensive benefit options that are intended to allow our employees and their families to live healthier and more secure lives.

Additionally, Amkor has implemented various retention programs at factory locations to incentivize and retain high-performing employees.

Factory locations also maintain training and development programs that enable the continued learning and growth of our employees, and senior management regularly meets to share and implement best practices among our various facilities.

We believe that our efforts to motivate and retain qualified employees is reflected in the long average tenure of our key employees.

Additionally, we strive to promote our management-level employees from within Amkor and believe that we have been successful in this effort.

Health and Safety

The health and safety of our employees is very important to us and, accordingly, we endeavor to provide comprehensive health benefits to all of our full-time employees.

Our focus on health and safety is further evident in our response to the Covid-19 pandemic around the globe.

Because our business involves the manufacturing and testing of physical products, many of our employees are unable to work from home.

In an effort to keep our employees safe and to maintain operations during the Covid-19 pandemic, we implemented a number of new health and safety-related measures during 2020.

Actions taken at Amkor’s facilities during the pandemic include:

• Establishing a response team with executive sponsors;

• Adopting a “no factory visit” policy;

• Implementing a work from home environment in all U.S.

locations, and certain international locations;

• Implementing extraordinary travel restrictions across the Company, including 14-day waiting periods for entry to Amkor factories after international travel;

• Communicating with employees about health and safety measures and educating employees about the outbreak;

• Arranging for alternative housing for employees in China who traveled;

• Screening everyone at campus entrances for fever and signs of illness;

• Increasing hygiene measures at dormitories, canteens and shuttles;

• Requiring masks to be worn and the use of disinfectants for hand washing;

• Implementing protocols to address actual and suspected Covid-19 cases and potential exposure;

• Restricting domestic and international non-essential travel for all employees.

Compared sentence by sentence after normalising whitespace, quotation marks, case and digits, so re-formatting and restated figures do not read as changed language. Wording changes appear as one removal and one addition. The current filing and the prior one are authoritative.

What changed 10-K

Item 1. Business