Company Overview
−Removed: Credo provides innovative, secure, high-speed and power-efficient connectivity solutions.
−Removed: Our solutions target the data infrastructure market, where bandwidth requirements are increasing exponentially, driven by the accelerating deployment of leading edge Artificial Intelligence infrastructure and applications.
−Removed: Our innovations ease system bandwidth bottlenecks while simultaneously improving on power, security and reliability.
−Removed: Our connectivity solutions are optimized for optical and electrical Ethernet applications, including the 100G (or Gigabits per second), 200G, 400G, 800G and emerging 1.6T (or Terabits per second) markets.
+Added: At Credo, our mission is to redefine high-speed connectivity by delivering breakthrough solutions that enable the next generation of AI-driven applications.
+Added: We are committed to enabling faster, more reliable, more energy-efficient, and scalable solutions that support the ever-expanding demands of AI, cloud computing and hyperscale networks.
+Added: Our connectivity solutions are optimized for optical and electrical Ethernet and PCIe applications, including the 100G (or Gigabits per second), 200G, 400G, 800G and emerging 1.6T (or Terabits per second) ethernet markets and the 32G PCIe5 and upcoming 64G PCIe6 markets.
Our products are based on our Serializer/Deserializer (SerDes) and Digital Signal Processor (DSP) technologies.
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The demands for increased bandwidth, improved power and cost efficiency and heightened security have simultaneously and dramatically expanded as work, education and entertainment have rapidly digitized across myriad endpoint users.
−Removed: We design, market and sell both product and IP solutions.
+Added: We design, market and sell both product, software and IP solutions.
We help define industry conventions and standards within the markets we target by collaborating with technology leaders and standards bodies.
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We sell our products to hyperscalers and cloud infrastructure providers, as well as MNO, MSO, 5G wireless, enterprise networking and high performance computing (HPC) customers.
−Removed: We are engaged with all of the major hyperscalers, and our customer base includes over 20 blue chip clients, including more than 10 original equipment manufacturers (OEMs) and original design manufacturers (ODMs), over 10 optical module manufacturers and other leading enterprises.
+Added: We are engaged with all of the major hyperscalers, and our customer base includes over 20 blue chip clients, including a broad mix of original equipment manufacturers (OEMs), original design manufacturers (ODMs), optical module manufacturers and other leading enterprises.
During fiscal 2025 and 2024, we generated $436.8 million and $193.0 million in total revenue, respectively.
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AI/ML Drives an Explosion in Network Traffic:
−Removed: Our hyperscale customers are increasingly pursuing AI/ML infrastructure that requires rack scale interconnectivity densities that are significantly higher than their general compute infrastructure.
+Added: Our hyperscale customers are increasingly pursuing AI/ML infrastructure that requires back end scale out interconnectivity densities that are an order or magnitude higher than their general compute infrastructure.
The growth of AI/ML model sizes is driving an explosion in interconnectivity traffic which enables multiple physical devices to work on the same model at high speed and low latency.
−Removed: Credo provides Ethernet solutions to support this type of interconnectivity, and we believe that as this market matures, it will migrate away from proprietary solutions and towards Ethernet as the standard solution.
+Added: Credo provides Ethernet solutions to support this type of interconnectivity, and we believe that Ethernet has now become the standard for back end scale out networks.
+Added: Back end scale up networks have grown from an appliance scale of 8 GPUs to rack scale of 72 GPUs in calendar 2024 and there is strong interest in growing this to scale in the coming years.
+Added: Scale up networks are already 10x denser than scale up networks, a full 100x denser than front end networks.
+Added: Scale up network architectures are dominated by Ethernet and PCIe PHYs at layer 1 with proprietary extensions at higher levels.
+Added: In calendar 2024, multiple hyperscalers show scale up networks growing beyond rack scale which will necessitate the need for retimers and/or DSPs to support high speed signaling at extended reach.
Hyperscaler General Compute Traffic Doubles Every 2-3 Years:
−Removed: Our hyperscale customers began to deploy Network Interface Card (NIC) speeds of 200G in calendar year 2023 with 400G on roadmaps for calendar year 2024.
−Removed: As NIC speeds double, there is a need for higher speed east-west traffic infrastructure to support applications such as Remote Direct Memory Access (RDMA), Nonvolative Memory Express (NVMe) and other high-bandwidth applications, while maintaining high reliability and observability within the power and cost constraints of a modern data center.
+Added: Our hyperscale customers began to deploy front end Network Interface Card (NIC) speeds of 200G in calendar year 2023 with 400G on roadmaps for calendar year 2024.
+Added: As NIC speeds double, there is a need for higher speed east-west traffic infrastructure to support applications such as Remote Direct Memory Access (RDMA), Non-volatile Memory Express (NVMe) and other high-bandwidth applications, while maintaining high reliability and observability within the power and cost constraints of a modern data center.
Hyperscalers, which have the ability to seamlessly provision and add compute, memory, networking and storage resources to a given node or set of nodes that make up a larger computing, distributed computing or grid computing environment, drive demand for high-speed, low-power connectivity solutions.
−Removed: Our hyperscale customers have deployed 50G per lane electrical PAM4 data rates in 2023, and they have begun deployments of 100G per lane electrical PAM4 solutions in 2024.
−Removed: Energy efficiency is becoming a key concern for customers as increased data transfer speeds require more energy to power and cool their systems.
−Removed: Credo’s low-power Screaming Eagle 112G/lane retimers and Dove800 DSPs are enabling our customers to achieve their technical objectives, as well as supporting the important ESG goals of our customers.
+Added: Our hyperscale customers have deployed 50G per lane electrical PAM4 data rates in 2023 and 100G per lane electrical PAM4 solutions in 2024.
Similarly, with the global deployment of high-speed fixed-line and wireless networks, carriers are also increasingly seeking higher performance connectivity solutions to address their substantial growth in traffic.
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Comprehensive Family of Connectivity Solutions:
−Removed: Our extensive solutions portfolio includes HiWire AECs, Optical PAM4 DSPs, Line Card PHYs, SerDes Chiplets for Multi-Chip Module (MCM) package
−Removed: integration and SerDes IP licensing.
+Added: Our extensive solutions portfolio includes HiWire AECs, Optical PAM4 DSPs, PCIe retimers, Line Card PHYs, SerDes Chiplets for Multi-Chip Module (MCM) package integration and SerDes IP licensing.
Our products and technologies address our customers’ various bandwidth, power, cost, security, reliability and end-to-end signal integrity requirements.
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We employ an engineering-focused workforce as well as a highly technical management team with deep industry experience and connectivity expertise.
−Removed: Our global team included 407 engineers as of April 27, 2024, and our international footprint allows us to continue attracting talent needed to support our business.
+Added: Our global team included 507 engineers as of May 3, 2025, and our international footprint allows us to continue attracting talent needed to support our business.
We are led by a team of seasoned semiconductor and connectivity experts.
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These relationships with leading hyperscalers, OEMs, ODMs and optical module manufacturers give us insight and extensive visibility into product designs, design specifications, development, production timelines, product implementations and product innovations.
−Removed: Our direct relationships enable us to better anticipate our customer needs and will facilitate our ability to sell multiple connectivity solutions to our customers over time.
+Added: Our direct relationships enable us to better anticipate our customer needs and serve to facilitate our ability to sell multiple connectivity solutions to our customers over time.
Our Products and Solutions
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HiWire AECs®:
−Removed: HiWire Active Electrical Cables (AECs) are copper interconnect cables designed for affordable, low-power operation at 100G, 200G, 400G, 800G and emerging 1.6T data speeds.
−Removed: HiWire AECs enable hyperscalers and 5G architects to accelerate the transition to Distributed, Disaggregated Chassis (DDCs) by offering a high-performance alternative to short, thick Direct Attach Cables (DACs) and higher-power, higher-cost Active Optical Cables (AOCs).
−Removed: DDCs allow providers to pair hardware from ODMs with open-source and third-party software to address issues surrounding operating expenses, flexibility and cost in traditional chassis applications.
−Removed: Our ToR to NIC AEC solutions enable hardware architects to pair commodity NIC and ToR hardware with value-added AECs to address needs related to redundancy and racking plans.
−Removed: Our HiWire AEC solutions include SWITCH, SPAN, SHIFT, and CLOS AECs, and Pluggable Patch Panel P3:
−Removed: • Credo HiWire SWITCH AECs enable a NIC to connect to two ToRs in an Active/Standby configuration for sub-millisecond failover that is fully network operating system managed.
−Removed: This enables the simplicity of a single NIC-ToR connector for the server and user with reliability and convergence times that are superior to legacy link aggregation structures.
+Added: Credo’s distinctive purple HiWire™ Active Electrical Cables (AECs) are plug-and-play copper interconnect cables designed for affordable, lossless operation at 100G, 200G, 400G,800G and emerging 1.6T data speeds.
+Added: AECs offer a high-performance alternative to short, thick DACs and high power, high-cost AOCs for data center compute and AI applications.
+Added: The applications for AECs in the data center can be categorized into Servers-TOR Racks and Leaf-Spine-Router Racks.
+Added: Credo offers AEC cables up to 7m to enable reliable links from GPU to network switch for AI racks with liquid cooling.
+Added: The HiWire AEC solutions include CLOS, SPAN, SHIFT and SWITCH family of cables.
+Added: • Credo HiWire CLOS AECs are specifically designed for high density in-rack or HPC rack-to-rack interconnect to support CLOS architectures, a type of non-blocking, multistage switching architecture that reduces the number of ports required in an interconnected fabric.
+Added: With up to 50% less power than optical solutions and up to 75% less volume than DACs, these AECs enable CLOS cabling densities up to 1,000 cables per rack.
• Credo HiWire SPAN AECs are a plug and play replacement of AOC for high-speed interconnects.
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In some cases, this involves speed shifting functionality where lane speeds are changed (e.g., one lane of 112G becomes 2 lanes of 56G), modulation schemes are changed(e.g., PAM4 symbol becomes two non-return-to-zero (NRZ) symbols) and forward error correction is terminated and/or generated to ensure a plug and play bridge between two different speed hosts.
−Removed: • Credo HiWire CLOS AECs are specifically designed for high density in-rack or HPC rack-to-rack interconnect to support CLOS architectures, a type of non-blocking, multistage switching architecture that reduces the number of ports required in an interconnected fabric.
−Removed: 50% less power than optical solutions and up to 75% less volume than DACs, these AECs enable CLOS cabling densities up to 1,000 cables per rack.
−Removed: • Credo Pluggable Patch Panel P3 enables services providers and hyperscalers flexibility in deploying modern pluggable optics with new and legacy switches and routers.
−Removed: The HiWire P3 is a single rack unit (1RU), 32 port QSFP-DD appliance that allows standard pluggable optics to directly connect to an AEC without the use of a switch chip, providing power, cooling, and control plane access.
+Added: • Credo HiWire SWITCH AECs enable a NIC to connect to two ToRs in an Active/Standby configuration for sub-millisecond failover that is fully network operating system managed.
+Added: This enables the simplicity of a single NIC-ToR connector for the server and user with reliability and convergence times that are superior to legacy link aggregation structures.
Optical DSPs:
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Optical transceivers and active optical cables (AOCs) based on Credo DSPs provide Ethernet connectivity from 5m up to 10km+ and span rates from 50Gb/s to 800Gb/s and beyond.
−Removed: Now in their fourth generation, Credo DSPs operating at 50G/lane and 100G/lane PAM4 offer an exceptional combination of performance, energy efficiency, and value by integrating such features as laser drivers, DSP based signal equalization, non-linear distortion compensation, transmitter signal conditioning and long reach capable host side SerDes.
+Added: Now in their fifth generation, Credo DSPs operating at 50G/lane and 100G/lane PAM4 offer an exceptional combination of performance, energy efficiency and value by integrating such features as laser drivers, DSP based signal equalization, non-linear distortion compensation, transmitter signal conditioning and long reach capable host side SerDes.
The Credo Seagull family of DSPs operate at 50G/lane.
−Removed: This comprehensive product family includes 1x50G, 2x50G, 4x50G and 8x50G product variants that enable transceivers and AOCs from 50Gb/s to 400Gb/s applications.
−Removed: Credo’s 50G/lane transimpedance amplifier (TIA) complements this family of devices and creates a compelling bundled solution of DSP, laser driver and TIA for new 50G/lane module designs.
+Added: This comprehensive product family includes 1x50G, 2x50G, 4x50G and 8x50G product variants that enable transceivers and AOCs from 50Gb/s to 400Gb/s.
Also included in the Seagull family is a unique product optimized for 64G Fibre Channel, used in storage networks.
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The range of laser drivers makes these DSPs suitable for both multi-mode and single-mode fiber applications operating at either 400Gb/s or 800Gb/s.
−Removed: The Dove 850 is the newest member of the Dove family and is the industry's first unidirectional 8x100G DSP specifically for Linear Receive Optics (LRO).
+Added: The Dove 850 is the industry's first unidirectional 8x100G DSP specifically for Linear Receive Optics (LRO).
LRO is an innovative new concept that removes DSP functionality from the module receiver to dramatically improve energy efficiency in high volume AI deployments.
+Added: In April of 2025, Credo introduced its Lark family of DSPs.
+Added: The Lark 800 is a high-performance, high-reliability, low-power DSP designed to enable a new generation of full retimed 800G transceivers destined for deployment in the exceedingly challenging power and cooling envelopes of the world’s largest and most dense AI data centers.
+Added: The Lark 850 is specifically designed for 800G LROs, with power consumption under 10W.
Line Card PHYs:
We are enabling data connectivity and security in hyperscale and enterprise data centers with leading edge, low-power line card PHY solutions.
−Removed: Our Retimers, Gearboxes and MACsec/IPSEC devices facilitate PAM4/NRZ backplane and line card connectivity at up to 112G per lane.
+Added: Our Retimers, Gearboxes and MACsec devices facilitate PAM4/NRZ backplane and line card connectivity at up to 112G per lane.
Our components enable platforms with capabilities reaching 52.1 Terabits per second (Tbps), featuring 800G ports.
−Removed: Dedicated and multi-mode Retimers, Gearboxes and MACsecs, each built around our low-power, high-performance SerDes IP, enable our customers to meet performance, power and price objectives.
−Removed: Our Line Card PHY product families include our Bald Eagle, Black Hawk and Screaming Eagle products for Retimer and Gearboxes, as well as our Owl and Osprey products for MACsec/IPSEC applications.
+Added: Dedicated and multi-function Retimers, Gearboxes and MACsec PHYs, each built around our low-power, high-performance SerDes IP, enable our customers to meet performance, power and price objectives.
+Added: Our Line Card PHY product families include our Bald Eagle, Black Hawk and Screaming Eagle products for Retimer and Gearboxes, as well as our Owl and Osprey products for MACsec applications.
SerDes Chiplets:
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SerDes IP is designed for the easy SoC integration of tens to hundreds of SerDes lanes.
−Removed: The IP range in performance for 1G to 112G per lane.
+Added: The IP range in performance from 1G to 112G per lane.
Additionally, we developed USB4 Version 2 SerDes IP which has been adopted by a major OEM.
We designed our SerDes IP to optimally balance performance, power and manufacturing process costs and risks.
−Removed: Our patented mixed signal and DSP architectures are the foundation of our high-performance and low-power SerDes technology.
+Added: Our patented mixed signal and DSP architectures are the foundation of our high-
+Added: performance and low-power SerDes technology.
Our architectural approach enables design in a mature fabrication process while delivering leading-edge performance and power efficiency, which has led to our more than 50 IP licensing engagements.
Nevertheless, as part of our commitment to long-term innovation, we continuously develop technology in cutting-edge fabrication processes such as 3nm in order to enhance our competitive position, and to serve the market of IP licensing customers whose logic requires cutting-edge fabrication processes.
+Added: PCIe Retimers:
+Added: Toucan PCI Express (PCIs) Gen6.x/CXL 3.x retimers, powered by Credo’s low latency, low-power DSPs and SerDes technology, are designed to extend PCIe trace lengths between root-complex and endpoint devices such as GPUs, SMART NICs, NVMe SSDs, and CXL memory.
+Added: Built using the 7nm process node, these retimers are optimized for cost-efficient production while delivering the highest performance, supporting cloud-scale datacenters and the growing demands of modern infrastructure with low latency and best-in-class signal integrity.
+Added: • Our PCIe Retimer devices are designed with our low power, industry-leading SerDes IP which has been optimized for low-latency PCIe.
+Added: • Built using the 7nm process node, these retimers are optimized for cost-efficient production while delivering the highest performance, supporting cloud-scale datacenters and the growing demands of modern infrastructure with low latency and best-in-class signal integrity.
+Added: • Enabled by our Toucan family of retimers, Credo’s OSFP-XD PCIe AECs provide extended range up to 7m with lossless end-to-end x16 Gen6 PCIe connectivity, allowing for transfer rates of up to 1Tb/sec.
+Added: PILOT Software Platform:
+Added: Credo’s proprietary Predictive Integrity, Link Optimization and Telemetry (PILOT) software empowers network administrators to detect, diagnose, and resolve signal degradation before it impacts workloads—dramatically reducing link flaps and minimizing costly system maintenance and down-time.
+Added: PILOT was released for evaluation on Credo’s Toucan PCIe retimers in the first quarter of fiscal 2026 and Credo expects to make PILOT available across Credo’s SerDes, retimers and system level AECs during fiscal year 2026.
Our Customers
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In fiscal 2025, sales to our top 10 customers accounted for approximately 90% of our total revenue.
−Removed: Furthermore, we had two customers that each accounted for 10% or more of our total fiscal 2024 revenue with the two customers accounting for 39% and 15%, respectively.
+Added: Furthermore, we had one customer that accounted for 10% or more of our total fiscal 2025 (such one customer accounting for 67% of total fiscal 2025 revenue).
Sales and Marketing
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(Amkor) and Advanced Semiconductor Engineering, Inc.
−Removed: (ASE) for packaging our IC products,
−Removed: King Yuan Electronics Company (KYEC) and Sigurd Microelectronics Corp.
+Added: (ASE) for packaging our IC products, King Yuan Electronics Company (KYEC) and Sigurd Microelectronics Corp.
(Sigurd) for testing our IC products and BizLink Technology, Inc.
−Removed: (BizLink) and Cheng Ui Precision Industry (Foxlink) for manufacturing our AEC products.
+Added: (BizLink) for manufacturing our AEC products.
Research and Development
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We have assembled a team of highly skilled engineers with deep signal processing expertise who are located in San Jose, California, mainland China and Taiwan.
−Removed: As of April 27, 2024, we employed 407 engineers.
+Added: As of May 3, 2025, we employed 507 engineers.
Research and development expenses for fiscal 2025 and 2024 were $146.0 million and $95.5 million, respectively.
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We rely on a combination of intellectual property rights, including patents, trade secrets, copyrights and trademarks and contractual protections, to protect our core technology.
−Removed: As of April 27, 2024, we owned 73 issued patents and 13 pending patent applications in the United States, and 31 issued patents and 35 pending patent applications in mainland China.
+Added: As of May 3, 2025, we owned 78 issued patents and 21 pending patent applications in the United States, and 48 issued patents and 22 pending patent applications in mainland China.
Our patent and patent application portfolio primarily relates to four main areas:
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It may also be shortened if a patent is terminally disclaimed over a commonly owned patent or a patent naming a common inventor and having an earlier expiration date.
−Removed: We cannot be sure that our pending patent applications that we have filed or may file in the future will result in issued patents, and we can give no assurance that any patents that have issued or might issue in the future will protect our current or future products, will provide us with any competitive advantage, and will not be challenged, invalidated or circumvented.
+Added: We cannot be sure
+Added: that our pending patent applications that we have filed or may file in the future will result in issued patents, and we can give no assurance that any patents that have issued or might issue in the future will protect our current or future products, will provide us with any competitive advantage, and will not be challenged, invalidated or circumvented.
Moreover, we rely, in part, on trade secrets to protect aspects of our business that are not amenable to, or that we do not consider appropriate for, patent protection.
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We believe we are the only company in our industry offering a complete suite of high-performance connectivity solutions.
−Removed: Our competitors typically compete with us with respect to some, but not all, of our
+Added: Our competitors typically compete with us with respect to some, but not all, of our solutions.
Our principal competitors with respect to our products include Broadcom Ltd.
−Removed: (Broadcom) and Marvell Technology, Inc.
−Removed: (Marvell), as well as various DAC suppliers.
−Removed: Our principal competitors with respect to IP licensing include Synopsys, Inc.
−Removed: (Synopsys), Cadence Design Systems, Inc.
−Removed: (Cadence) and Alphawave IP Group plc (Alphawave).
+Added: (Broadcom), Marvell Technology, Inc.
+Added: (Marvell) and Astera Labs, Inc.
+Added: (Astera), as well as various cable suppliers.
The principal competitive factors in our market include:
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Employees and Human Capital Resources
−Removed: As of April 27, 2024, approximately 407 of our 500 full-time equivalent employees were engineers.
+Added: As of May 3, 2025, approximately 507 of our 622 full-time equivalent employees were engineers.
Of our employees, 170 were located in North America and 337 were located in Asia.
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Our employees are our most valuable assets.
−Removed: Our core philosophy is that our employees are our most important backers, investing their time and professional reputations in the company.
+Added: Our core philosophy is that our employees are our most
+Added: important backers, investing their time and professional reputations in the company.
We continually assess our business to identify our talent needs.
−Removed: We have a diverse workforce that represents many cultures and we celebrate our diversity by fostering inclusion across our multinational organization.
+Added: We have a diverse workforce that represents many cultures and we celebrate our workforce by fostering inclusion across our multinational organization.
Our objective is to attract and retain talented and experienced employees, advisors and consultants.
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Our company-wide compensation structure is intended to align incentives with the success of Credo.
−Removed: We believe that this fosters collaboration within the company, as all teams are working together towards
−Removed: the same goals.
−Removed: We offer a combination of competitive base salary, time-based equity incentives and discretionary bonuses, generally linked to our financial performance, designed to motivate and reward our employees.
+Added: We believe that this fosters collaboration within the company, as all teams are working together towards the same goals.
+Added: We offer a combination of competitive market-based base salary, time- and performance-based equity incentives and discretionary bonuses, generally linked to individual and company financial performance designed to motivate and reward our employees.
For more details regarding our executive compensation, refer to information incorporated by reference from the information set forth under the captions “Executive Compensation” and “Compensation Discussion and Analysis” in our upcoming 2025 Proxy Statement.
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Compared sentence by sentence after normalising whitespace, quotation marks, case and digits, so re-formatting and restated figures do not read as changed language. Wording changes appear as one removal and one addition. The current filing and the prior one are authoritative.