Item 1. Business
ITEM 1. BUSINESS
General
QuickLogic Corporation was founded in 1988 and completed its reincorporation in Delaware in 1999. We develop programmable logic semiconductor technologies, including embedded Field Programmable Gate Array ("eFPGA") intellectual property ("IP") and specialized FPGA devices used in a range of applications requiring adaptable hardware functionality. Our technologies enable customers to incorporate programmable logic into custom semiconductor devices or deploy standalone programmable devices to implement system control, hardware acceleration, and other configurable functions.
We are a fabless semiconductor company whose primary offerings include eFPGA IP licensing, discrete FPGA devices, and related development tools and software. Semiconductor companies license our eFPGA IP to integrate programmable logic blocks into their application-specific integrated circuits ("ASICs") and system-on-chip ("SoC") devices. Our discrete FPGA devices enable customers to implement custom hardware functionality in applications requiring flexibility, low power consumption, and long product life cycles.
Our programmable logic technologies are used in a variety of markets, including aerospace and defense, industrial and infrastructure systems, data processing and computing platforms, and certain embedded and edge computing applications. The combination of programmable silicon technologies, software tools, and design resources enables customers to efficiently incorporate field-programmable hardware capabilities into both custom silicon and system-level products.
Certain of our programmable logic technologies are designed for applications requiring deterministic hardware operation, security, and long operational lifetimes, including aerospace, defense, and industrial systems, where reliable electronics are critical to system performance.
We also support government-sponsored initiatives focused on strengthening trusted microelectronics capabilities and advancing radiation-tolerant programmable logic technologies used in aerospace, defense, and other mission-critical systems.
Our current product offerings include our eFPGA IP licensing business and associated professional services, which consist of development and integration of eFPGA technology into customer semiconductor devices, as well as a range of FPGA silicon products, including EOS™, ArcticLink® III, PolarPro®3, PolarPro II, PolarPro®, and Eclipse II products. Our mature products include FPGA families such as PASIC®3 and QuickRAM®, as well as programming hardware and design software tools that support the development and deployment of programmable logic designs.
We collaborate with a range of ecosystem partners on co-marketing, co-selling, and technology initiatives supporting our IP and silicon platforms. These partners include semiconductor IP providers, semiconductor design service companies, semiconductor foundries, semiconductor assembly and test providers, and other technology companies that support the development and deployment of programmable silicon solutions.
Our eFPGA IP is currently developed across a range of semiconductor manufacturing process technologies, including Intel 18A and process nodes such as 12nm, 16nm, 22nm, 28nm, 40nm, 65nm, 90nm, 130nm, 250nm, and 350nm with a roadmap targeting additional advanced semiconductor nodes. Our licensable IP is generated using our automated IP generator tool, Australis™, which enables the creation of customized eFPGA IP architectures that can be integrated into customer ASIC and SoC designs. This automated architecture generation capability allows customers to incorporate programmable logic into custom semiconductor devices with limited ongoing development involvement from QuickLogic, enabling a scalable IP licensing model.
As a fabless semiconductor company, we rely on third-party semiconductor foundries and manufacturing partners to fabricate, assemble, and test our silicon products. We work with multiple manufacturing partners to support a range of product volumes and applications, including the development of certain programmable logic technologies designed for use in semiconductor manufacturing environments operated within the United States.
Our EOS S3™ and ArcticLink® III silicon platforms combine mixed-signal physical functionality and fixed-function logic alongside programmable logic resources. Integrating these capabilities allows customers to implement cost-effective and energy-efficient system architectures while retaining the flexibility of programmable hardware. These platforms are designed to take advantage of semiconductor manufacturing nodes that enable reduced power consumption and smaller die sizes.
For cost-sensitive applications, we utilize small form-factor packaging options that reduce device cost and minimize printed circuit board space requirements for customers. For applications requiring enhanced environmental reliability, including certain aerospace and defense systems, we support packaging options designed for ruggedized operating environments.
We expect that future revenue growth will depend on the continued adoption of our eFPGA IP technologies, the introduction of new FPGA devices, and the ongoing demand for our existing programmable logic products. Our growth strategy includes expanding our eFPGA IP business, developing additional programmable logic devices and architectures, and supporting the integration of programmable logic technologies into a broad range of semiconductor and system-level applications.
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Available Information
Our corporate headquarters are located at 2220 Lundy Avenue, San Jose, California 95131. We can be reached at (408) 990-4000, and our website address is www.quicklogic.com . The information on our website is not incorporated herein by reference and is not a part of this Form 10-K. Our common stock trades on the Nasdaq Capital Market under the symbol “QUIK.” Our annual reports on Form 10-K, quarterly reports on Form 10-Q, current reports on Form 8-K, and amendments to such reports are available, free of charge, on our website home page as soon as reasonably practicable after we electronically file such materials with, or furnish them to, the Securities and Exchange Commission, or the SEC. Copies of the materials filed by the Company with the SEC are also available on the SEC’s website at www.sec.gov . A copy of our Code of Conduct and Ethics is posted on our website at https://ir.quicklogic.com/governance-docs. Any amendments to or waiver from this Code of Conduct and Ethics will be posted to this page on our website.
Fiscal Year
Our fiscal year ends on the Sunday closest to December 31. References to Fiscal Years 2025 and 2024 refer to the Fiscal Years ended December 28, 2025 and December 29, 2024 , respectively.
Industry Background
Historically, system processing capability was built using a homogeneous architecture consisting primarily of a single type of processing technology, such as a general-purpose processor or programmable logic device. In recent years, semiconductor system architectures have increasingly adopted heterogeneous processing models that combined multiple types of compute resources. Examples include the integration of one or more general purpose processor cores (such as Arm® or RISC-V) together with programmable logic or specialized hardware accelerators. These heterogeneous architectures allow system designers to partition application workloads across different types of compute resources so that each workload is executed on the most efficient processing element. This approach often improves system performance, energy efficiency, and flexibility.
Heterogeneous architectures can be implemented in several ways, including the use of multiple discrete semiconductor devices on a printed circuit board, multiple integrated IP blocks within a monolithic semiconductor device, or multiple semiconductor devices (such as chiplets) integrated together within an advanced package. These approaches allow system designers to combine different processing technologies to achieve the desired balance of performance, power consumption, flexibility, and cost.
An important underlying trend in the aerospace and defense and industrial markets is the increasing fragmentation and specialization of system functionality. System designers in these markets often require hardware solutions that can be rapidly developed, modified, and extended over long product life cycles while supporting evolving algorithms, communications protocols, and application requirements. As a result, system developers increasingly prioritize development time, design flexibility, and non-recurring engineering ("NRE") costs over the lowest possible bill of materials cost.
We believe these industry trends are influencing the relative demand among several classes of core semiconductor technologies. The primary classes of non-memory semiconductor devices include the following:
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Microcontrollers ("MCUs") are typically low-power integrated circuits containing a processor core, memory, and peripheral interfaces designed for embedded applications programmed primarily through software;
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Application Specific Standard Products ("ASSPs") , other than processors, are fixed-function semiconductor devices designed to perform specific hardware functions. These devices often integrate a set of commonly used peripherals or functions and are typically optimized for particular applications. Their functionality is fixed prior to fabrication;
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Programmable Logic Devices ("PLDs") are general-purpose semiconductor devices that can be configured by system designers after fabrication to implement application-specific hardware functionality. FPGAs are a subset of PLDs that are commonly used to implement complex digital logic functions and system interfaces; and
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Application Specific Integrated Circuits ("ASICs") are custom semiconductor devices designed and fabricated to meet the requirements of a specific application for a specific customer. Structured ASICs represent a sub-category that provides limited customization to broaden the applicability of the device across related applications.
ASSP devices are offered broadly to the market and typically implement standardized functionality. As a result, system designers may need to combine multiple ASSP devices to implement the desired system architecture, which can increase system cost, power consumption, and board complexity. In addition, when standards evolve or new application requirements emerge, suitable ASSP devices may not yet exist to implement the desired functionality.
System designers can customize hardware functionality using programmable logic devices, ASICs, or software-programmable processors. Each class of semiconductor device presents different trade-offs between development cost, unit cost, flexibility, and development risk. ASICs may provide the lowest unit cost at high production volumes but typically involve significant development time, engineering cost, and design risk. Programmable logic devices provide a lower development risk and faster time-to-market because functionality can be configured after fabrication. As programmable logic technologies have evolved and device costs have declined over time, the production volumes required to justify a fully custom ASIC solution have increased.
FPGA technology has historically enabled system designers to develop and deploy application-specific hardware functionality with relatively fast development cycles and lower upfront engineering costs compared to ASICs. FPGAs are widely used across multiple end-markets, including aerospace and defense, industrial systems, computing, communications, embedded systems, and consumer electronics.
According to a recent research report published by Markets and Markets, the global FPGA market was valued at approximately $11.7 billion in 2025 and is projected to grow to approximately $19.3 billion by 2030, reflecting continued adoption of programmable logic technologies across a range of markets. Growth in the FPGA market is driven by increasing demand for hardware acceleration, adaptable system architectures, and the ability to support evolving algorithms and application requirements.
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More recently, the emergence of eFPGA IP has expanded the use of programmable logic beyond discrete FPGA devices. eFPGA technology allows semiconductor companies to integrate programmable logic blocks directly into ASIC and SoC devices, enabling designers to incorporate adaptable hardware acceleration and configurable functionality within custom silicon designs. This approach can improve system integration, reduce latency, and enable post-silicon flexibility while maintaining the performance and power efficiency advantages of ASIC architectures.
The aerospace and defense and industrial markets often require semiconductor solutions capable of operating in demanding environments and supporting long product life cycles. In these markets, system designers frequently require specialized functionality, extended temperature operation, radiation tolerance, and high reliability. When suitable standard semiconductor devices are not available, designers may turn to programmable logic devices or custom ASIC development to meet these requirements.
QuickLogic FPGA technologies have historically been used in certain segments of these markets where characteristics such as instant-on operation, energy efficiency, deterministic hardware behavior, and protection of intellectual property are important. In addition, we have increasingly focused on providing programmable logic technologies that support mission-critical applications requiring secure and reliable hardware operations.
Since 2022, QuickLogic has also entered into multiple contracts related to embedded FPGA technologies with customers servicing the aerospace and defense market. Advances in our Australis IP generator technology, participation in industry technology ecosystems, and the development of programmable logic technologies designed for demanding operating environments have contributed to increased engagement with customers in the defense industrial base. We believe these trends may support continued growth opportunities for programmable logic technologies in aerospace, defense, and other mission-critical markets.
Markets and Product Technology
We market our programmable logic technologies, including FPGA devices and eFPGA IP, primarily to Defense Industrial Base contractors, U.S. Government entities, system original equipment manufacturers ("OEMs"), and fabless semiconductor companies. These customers utilize our programmable logic technologies to incorporate adaptable hardware functionality within system-level designs or custom semiconductor devices.
Our technologies enable customers to implement customized hardware functionality while supporting characteristics such as low power consumption, design flexibility, rapid development cycles, long product life cycles, and reduce total cost of ownership. Depending on customer requirements, solutions may incorporate our programmable logic technologies together with semiconductor IP, software tools, and design resources that support the development and deployment of programmable hardware functionality.
Through the use of our programmable silicon platforms, semiconductor IP, software tools, and architecture expertise, we support the development of energy-efficient hardware solutions that combine the benefits of fixed-function semiconductor devices with the flexibility and adaptability of programmable logic technologies. In certain cases, we develop IP, software, or firmware internally, while in other cases, we collaborate with third parties to integrate mixed-signal interfaces, logic functions, or software components required to complete a customer solution.
Our product technology consists of four major elements:
1. Programmable Logic Technology
Our programmable logic technologies enable our customers to customize hardware functionality within semiconductor devices or system-level platforms. We support two primary classes of programmable logic architectures: reprogrammable logic and one-time programmable ("OTP") logic.
Reprogrammable logic architectures allow hardware functionality to be configured and updated after manufacturing. Our reprogrammable programmable logic technology is primarily based on SRAM configuration elements and forms the foundation of our eFPGA IP and certain programmable logic silicon devices. These architectures can be implemented using standard semiconductor foundry process technologies, including conventional CMOS logic processes that incorporate foundry-provided SRAM memory elements.
In certain specialized applications, reprogrammable logic architectures may incorporate alternative non-volatile memory technologies such as magnetoresistive random-access memory ("MRAM"). These architectures can support operating environments that require enhanced reliability characteristics, including certain radiation-tolerant applications.
Our second class of programmable logic technology is our ViaLink® OTP architecture. ViaLink is a proprietary and patented antifuse-based programmable logic technology that provides non-volatility, instant-on operation, very low standby power consumption, low dynamic power, and compact device form factors. OTP architectures are commonly used in applications requiring secure and deterministic hardware operation.
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2. Semiconductor Intellectual Property
We develop semiconductor IP cores that may be licensed to customers or integrated into our own programmable logic devices. Our licensable programmable logic IP is referred to as eFPGA IP.
Our eFPGA IP enables semiconductor companies to integrate programmable logic blocks directly into ASICs or SoC devices. This capability allows customers to incorporate adaptable hardware acceleration, system control functions, and configurable digital logic within custom semiconductor designs.
Our eFPGA IP architectures are generated using our automated IP generator tool, Australis™, which enables the creation of customized programmable logic architectures that can be integrated into customer semiconductor designs. The Australis™ architecture generation process allows our customers to incorporate programmable logic functionality with limited ongoing development involvement from QuickLogic, supporting a scalable IP licensing and support model.
In addition to programmable logic architectures, we may also provide other IP blocks that customers can integrate alongside eFPGA IP within their designs. These may include signal processing functions, digital filtering blocks, hardware acceleration functions, processor offload engines, and various interface and bus connectivity components.
3. FPGA User Tools
We develop and support software tools that enable customers to design, configure, and deploy programmable logic functionality within our FPGA devices, eFPGA IP architectures, and programmable silicon platforms. As programmable logic devices are manufactured in an unconfigured state, system designers must configure the programmable logic resources to implement their desired hardware functionality using a set of design and programming tools commonly referred to as FPGA User Tools.
Our FPGA User Tools support two general approaches: proprietary development tools and open-source tool flows. Historically, FPGA vendors have provided proprietary tool chains to support device configuration and design development. For certain mature products, we continue to support proprietary FPGA development tools.
For our newer programmable logic platforms and eFPGA IP technologies, we support open-source FPGA development flows, as well as hybrid tool environments. Our Aurora development platform combines open-source FPGA development tools with selected proprietary technology elements, including logic synthesis capabilities based on industry-standard synthesis tools. This approach enables customers to use a flexible development environment while maintaining compatibility with established semiconductor design workflows.
4. Silicon Platforms
We offer programmable silicon platforms that include both discrete FPGA devices and SoC devices incorporating programmable logic resources.
Our discrete FPGA devices have historically been based on our ViaLink® OTP programmable logic technology and more recently, also incorporate reprogrammable programmable logic architectures using SRAM or other memory technologies for configuration.
In addition to standalone FPGA devices, we develop silicon platforms that integrate programmable logic together with fixed-function hardware blocks and mixed-signal capabilities. These SoC platforms include products such as ArcticLink®, EOS S3™, EOS S3 LV™, and EOS S3AI™.
By integrating programmable logic together with hard-wired logic blocks and mixed-signal functions, these platforms allow customers to implement energy-efficient system architectures while retaining the flexibility to customize hardware functionality through programmable logic. Hard-wired IP blocks provide optimized performance and power efficiency for commonly used functions, while the programmable logic fabric enables customers to adapt the platform to specific application requirements.
This combination of programmable logic, fixed-function hardware, and mixed-signal capabilities enables us to deliver semiconductor solutions that can be customized for a variety of application requirements while supporting reduced system complexity, lower power consumption, and efficient system integration.
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Competitive Strengths
We believe several characteristics of our technology and business model differentiate us within the programmable logic and semiconductor IP markets, including:
Programmable Logic Expertise
QuickLogic has developed programmable logic technologies over several decades and we have extensive experience in the design and deployment of FPGA architectures and related development tools. Our experience spans multiple semiconductor process technologies, programmable logic architectures, and end markets that require adaptable hardware functionality.
Embedded FPGA Intellectual Property Platform
Our eFPGA IP enables semiconductor companies to integrate programmable logic blocks into ASICs and SoC devices. This capability allows customers to incorporate configurable hardware functionality within custom semiconductor designs while maintaining the performance and power advantages of ASIC architectures.
Our automated IP generation platform, Australis™, enables the development of customized programmable logic architectures for integration into customer designs. This automated architecture generation capability allows us to support a scalable IP licensing model while enabling customers to efficiently integrate programmable logic into their semiconductor products.
Flexible Programmable Logic Architectures
Our programmable logic technologies support multiple configuration approaches, including reprogrammable architectures and OTP architectures. These architectures enable customers to select programmable logic technologies that best meet their requirements in flexibility, power consumption, security, and reliability.
Long Life Cycle and Mission-Critical Applications
Certain of our programmable logic technologies are used in applications requiring long product life cycles, deterministic operation, and reliable system behavior. These characteristics are important in markets such as aerospace and defense, industrial systems, and infrastructure applications where systems may operate for extended periods and hardware reliability is critical.
Scalable Ecosystem and Development Tools
We support our programmable logic technologies with development tools and software platforms that allow customers to design and deploy hardware functionality using our FPGA devices and eFPGA IP architectures. Our support for both proprietary and open-source development flows enables customers to integrate programmable logic functionality within established semiconductor and system design workflows.
Fabless Manufacturing Model
As a fabless semiconductor company, we utilize third-party foundries, assembly providers, and testing partners to manufacture our silicon devices. This model allows us to leverage advanced semiconductor manufacturing technologies without maintaining internal wafer fabrication facilities, enabling us to focus our resources on programmable logic architecture development and customer engagement.
Marketing, Sales, and Customers
We monetize our programmable logic technologies primarily through the sale of FPGA semiconductor devices and the licensing of eFPGA IP. In connection with eFPGA IP licensing engagements, we may also provide professional engineering services to support the integration of programmable logic technology into customer semiconductor designs. In certain cases, our licensing arrangements may include royalty payments based on customer production volumes.
Our technologies enable customers to incorporate adaptable hardware functionality into semiconductor devices or system-level products. Customers utilize our programmable logic technologies either through our discrete FPGA devices or by integrating our eFPGA IP directly into ASICs or SoC designs. These technologies allow system designers to implement hardware acceleration, system control functions, and configurable digital logic while maintaining low power consumption and design flexibility.
eFPGA technology provides ASIC and SoC developers with the ability to incorporate programmable hardware functionality directly within custom semiconductor devices. This capability enables designers to support evolving application requirements, implement hardware acceleration functions, and reduce the risk associated with fixed-function semiconductor architectures.
We recognize that many of our target markets require integrated hardware solutions that combine programmable logic with other semiconductor and system technologies. Accordingly, we collaborate with a range of industry partners to develop solutions that incorporate programmable silicon platforms, semiconductor IP, packaging technologies, development tools, and other supporting technologies. These collaborations allow us to support the performance, power efficiency, form factor, and life cycle requirements of our customers' systems.
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We recognize that our markets require a range of solutions, and we intend to work with market-leading companies to combine silicon solution platforms, packaging technology, FPGA User Tools, sensor software algorithms, software drivers, and firmware, to meet the product proliferation, high bandwidth, time-to-market, time-in-market, and form factor requirements of our customers. We intend to continue to define and implement compelling solutions for our target customers and partners.
We believe our programmable logic technologies address several important requirements for system designers, including low power consumption, platform flexibility, rapid development cycles, extended product life cycles, and reduced total cost of ownership.
We sell our products through a combination of direct sales personnel and sales channel partners in North America, Europe, and Asia. Our direct sales organization focuses on strategic customer engagements and technical support, while our channel partners and distributors support product availability and regional sales activities. In addition to our corporate headquarters in San Jose, California, we maintain international sales operations in Japan and the United Kingdom.
Customers typically purchase our FPGA devices through authorized distributor s. We currently work with a network of distributors in North America, Europe, and Asia to support our global sales activities. C ustomers licensing our eFPGA IP generally enter into licensing agreements directly with QuickLogic.
We serve customers across several markets, including aerospace and defense, industrial systems, computing platforms, and semiconductor companies developing custom ASIC or SoC devices. Certain customers in aerospace, defense, and industrial markets continue to utilize our existing FPGA device platforms, while semiconductor companies increasingly license our eFPGA IP to integrate programmable logic into custom semiconductor designs.
One customer represented approximately 44% and another customer represented approximately 11% of our total revenue from continuing operations for the year ended December 28, 2025 . One customer represented 56% of our total revenue from continuing operations f or the year ended December 29, 2024 . In addition, a significant portion of our revenue is derived from customers located outside the United States. See Note 15 to the consolidated financial statements for additional information.
Backlog
We do not believe that backlog as of any particular date is indicative of future results. The majority of our quarterly silicon shipments are typically booked during the quarter. Our silicon sales are made primarily pursuant to standard purchase orders issued by OEM customers and distributors. Our eFPGA IP and design service contracts are typically made pursuant to license agreements and development contracts. Development contracts can span several months to several quarters in duration.
Competition
The semiconductor industry is highly competitive and characterized by rapid technological change, evolving industry standards, and frequent new product introductions. We compete with a range of semiconductor companies that provide programmable logic devices, semiconductor IP, or alternative technologies that can perform similar system functions.
In the market for eFPGA IP, our competitors include other semiconductor IP providers and technology companies developing programmable logic architectures for integration into ASICs and SoC devices. These competitors may include both established semiconductor companies and smaller venture-backed companies.
In the market for discrete FPGA devices, we compete with suppliers of programmable logic devices including Lattice Semiconductor Corporation, Microchip Technology Inc. (which acquired Microsemi Corporation), Advanced Micro Devices, Inc. (which acquired Xilinx, Inc.), and Intel Corporation (whose programmable logic business operates under the Altera brand). These companies offer a broad range of applications and performance requirements.
Competition within the programmable logic market is influenced by several factors, including product performance, power consumption, device density, development tools, IP availability, product life cycle support, and the ability to meet specific application requirements. In certain applications, programmable logic devices also compete with alternative semiconductor solutions, including ASICs, ASSPs, and software-programmable processors.
We believe our programmable logic technologies compete effectively in applications that benefit from configurable hardware functionality, low power consumption, flexible system architectures, and long product life cycle support.
Research and Development
Our research and development activities are primarily focused on advancing our programmable logic technologies, including eFPGA IP, FPGA semiconductor devices, and associated software development tools. Our solutions combine programmable silicon platforms with semiconductor IP, FPGA development tools, software drivers, and other supporting system software.
Our future success depends in large part on our ability to execute on existing development programs involving eFPGA IP technologies and FPGA devices, as well as securing additional design engagements with semiconductor and system companies seeking to integrate programmable logic technologies into their products.
We have made, and expect to continue to make, substantial investments in research and development ("R&D"). Our R&D expenses from continuing operations were $5.3 million, or 38% of revenue and $5.8 million, or 30% of revenue for the Fiscal Years ended December 28, 2025 and December 29, 2024, respectively. Research and development expenses for the year ended December 28, 2025 reflect increases in employee compensation, depreciation, and expenses associated with financing arrangements.
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Manufacturing
As a fabless semiconductor company, we rely on third-party manufacturing partners for wafer fabrication, package assembly, and device testing. This approach allows us to leverage the manufacturing scale and process technologies of established semiconductor suppliers while focusing our internal resources on programmable logic architecture development, product design, and customer engagement.
For our commercial products, we outsource wafer fabrication primarily to GlobalFoundries and Taiwan Semiconductor Manufacturing Company Limited ("TSMC"). Packaging and assembly services for our commercial products are provided by third-party semiconductor assembly and test providers, including Amkor Technology, Inc. Integra Technologies, Inc., and Golden Altos Corporation.
GlobalFoundries manufactures several of our programmable silicon platforms, including EOS S3™, EOS S3 LV™, and EOS S3AI™ devices using a 40-nanometer complementary metal oxide semiconductor ("CMOS") process, and PolarPro® 3E, ArcticLink® III VX and BX products using a 65-nanometer CMOS process. We also have recently used GlobalFoundries 12nm process for a new FPGA device test chip. TSMC manufactures certain of our mature FPGA products, including PASIC® 3 and QuickRAM® devices, using 0.35-micron CMOS process, and Eclipse® devices using a 0.25-micron CMOS process. We purchase wafers from these suppliers primarily on a purchase order basis.
Outsourcing wafer fabrication allows us to benefit from the manufacturing scale, process technologies, and operational efficiencies of leading semiconductor foundries. We may establish additional foundry relationships in the future as required to support new product development, customer requirements, or supply chain diversification. For certain products used in aerospace, defense, and government-related applications, we may be required to source wafer fabrication, packaging, and testing services from suppliers that meet specific security, traceability, and quality standards. In these cases, we work with manufacturing partners that support trusted microelectronics programs and maintain appropriate certifications and operational controls required by U.S. government customers.
Employees and Human Capital
As of December 28, 2025, we had fifty-one employees worldwide, of which forty-three employees were located in the United States. We believe o ur future success depends in part on our continued ability to attract, hire, and retain qualified personnel. None of our employees are represented by a labor union and we believe our employee relations are favorable. We recognize that in order to drive innovation and operational excellence, we must attract, develop, motivate, and retain highly qualified talent. The well-being of employees is a key priority and includes a dynamic and welcoming workplace that promotes inclusive diversity, fosters collaboration, encourages employees to bring their best ideas to work every day, and promotes work-life balance. The principal purposes of our equity and cash incentive plans are to attract, retain, and reward personnel through the granting of stock-based and cash-based compensation awards, in order to increase shareholder value and the success of our company by motivating such individuals to perform to the best of their abilities and achieve our objectives.
As of
December 28, 2025, our research and development staff consisted of
twenty-four employees located in
California, Idaho, Indiana, Massachusetts, Missouri, New Jersey, Oregon, Texas, Utah, Washington, Canada, and Taiwan. These employees constitute the following groups:
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Our silicon engineering group develops our eFPGA IP and FPGA products.
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Our electronic design and automation software group collaborates with the open-source software community to ensure the design libraries, interface routines, and place and route software that allow our customers to take their own designs and target them to programmable hardware products are optimized. Our system software group creates the drivers and other system code required to connect our silicon hardware products to Application Processors, drivers, and microcode to support our sensor hubs.
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Our hardware group develops and verifies IP Blocks that can be programmed into our programmable logic and develops primarily open-source hardware reference designs to showcase and verify our solutions.
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Our product engineering group oversees product manufacturing and process development with our third-party foundries and is involved in ongoing process improvements to increase yields and optimize device characteristics.
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The office of the CTO investigates future trends and requirements in order to define the next generation of solutions and platforms.
We monitor employee turnover rates by region and globally. Approximately 33% of our employees have been employed by us for more than 10 years and approximately 24% have been employed by us for more than 20 years. The average tenure is 9.6 years. Our turnover rate was 21% for the fiscal year ended December 28, 2025. Excluding the disposition of SensiML, our turnover rate was 16% for the fiscal year ended December 28, 2025. We believe our compensation philosophy, along with the career growth and development opportunities promote longer employee tenure and reduce voluntary turnover.
Intellectual Property
We believe that it is important to maintain a large patent portfolio to protect our innovations. We currently hold twenty-two active U.S. patents and have five pending applications for additional U.S. patents. Our patents contain claims covering various aspects of programmable integrated circuits, programmable interconnect structures, and programmable metal hardware products. In Europe and Asia, we hold five patents and have zero pending applications . Our issued patents expire between 2026-2042.
I n most cases, revenue will decline from a decrease in demand for our mature products long before the expiration of pending or issued patents relating to the underlying technology in such products. The decision to cease maintaining a patent is made based on the importance of the patent in our current or future product offerings.
We have five registered trademarks with the U.S. Patent and Trademark Office.
With regard to certain patents, the U.S. Government has an irrevocable, non-exclusive, royalty-free license, pursuant to which the U.S. Government may use or authorize others to use the inventions covered by such patents.
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Information About Our Executive Officers and Directors
Our executive officers are appointed by, and serve at the discretion of, our Board of Directors. There are no family relationships among our directors and officers.
The following table sets forth certain information concerning our current executive officers and directors as of March 27, 2026:
Name
Age
Position
Brian C. Faith
51
President and Chief Executive Officer; Director
Elias Nader
61
Chief Financial Officer and Senior Vice President (SVP) of Finance
Rajiv Jain
65
Vice President, Worldwide Operations
Timothy Saxe
70
Senior Vice President Engineering and Chief Technology Officer
Owen Bateman
59
Vice President, Worldwide Sales
Andrew Jaros
63
Vice President, Intellectual Property Sales
Michael R. Farese
79
Chairman of the Board
Joyce Kim
55
Director
Andrew J. Pease
75
Director
Ron Shelton
64
Director
Gary H. Tauss
71
Director
Brian C. Faith joined QuickLogic in June 1996 and has served as President and Chief Executive Officer since June 2016. Prior to his appointment as Chief Executive Officer, Mr. Faith served as Vice President of Worldwide Marketing and Vice President of Worldwide Sales & Marketing from 2008 and 2016. During his tenure at QuickLogic, Mr. Faith has held a variety of managerial and executive leadership positions spanning engineering, product line management, marketing, and sales. Mr. Faith has served on the board of the Global Semiconductor Alliance (GSA) and previously served as Chairman of the Marketing Committee for the CE-ATA Organization. He holds a Bachelor of Science degree in Computer Engineering from Santa Clara University and has served as an Adjunct Lecturer at Santa Clara University, teaching courses related to programmable logic.
Elias Nader joined QuickLogic in February 2022, bringing more than three decades of leadership experience across the semiconductor and technology industries, including over 20 years in senior executive roles. Before joining QuickLogic, Mr. Nader served as Senior Vice President and Chief Financial Officer at Pixelworks, Inc. (2019-2022), where he led all global General and Administrative functions and partnered closely with the Board of Directors to drive strategic and operational initiatives. Prior to Pixelworks, Inc., Mr. Nader held several key leadership positions at Sigma Designs, Inc., including Senior Vice President, Chief Financial Officer and Corporate Secretary (2013-2017), followed by his appointment as interim Chief Executive Officer (2017-2019). Earlier in his career, he held executive roles at Dionex Corporation and interWave Communications, further broadening his operational and financial expertise. Mr. Nader serves on the Boards of Directors of Immersion Corporation (IMMR) and Barnes & Noble Education Group (BNED), where he provides strategic, financial, and operational oversight. He holds a Bachelor of Science degree in Accounting with a Minor in Economics, as well as an MBA in International Business, all from San Jose State University.
Rajiv Jain joined QuickLogic in August 1992. Mr. Jain has served as our Vice President of Worldwide Operations since April 2014. Prior to this role, Mr. Jain served as QuickLogic’s Senior Director of Operations and Development Engineering from 2011 to 2014, Senior Director of System Solutions and Process Technology from 2009 to 2011, Director of Process Technology from 1997 to 2009, and Senior Process Technologist from 1992 to 1997. Prior to joining QuickLogic, Mr. Jain was a Senior Yield Engineer at National Semiconductor from 1991 to 1992, where he focused on BiCMOS product yield improvements, and at Monolithic Memories from 1985 to 1988, where he focused on BiPolar product yield and engineering wafer sort improvements. Mr. Jain holds a Master’s degree in Chemical Engineering from the University of California, Berkeley and a B.S. degree in Chemical Engineering from the University of Illinois, Champaign/Urbana.
Timothy Saxe (Ph.D.) joined QuickLogic in May 2001. Dr. Saxe has served as our Senior Vice President of Engineering and Chief Technology Officer since August 2016 and Senior Vice President and Chief Technology Officer since November 2008. Previously, Dr. Saxe held a variety of executive leadership positions in QuickLogic including Vice President of Engineering and Vice President of Software Engineering. Dr. Saxe was Vice President of FLASH Engineering at Actel Corp., a semiconductor manufacturing company, from November 2000 to February 2001. Dr. Saxe joined GateField Corp., a design verification tools and services company formerly known as Zycad, in June 1983 and was a founder of their semiconductor manufacturing division in 1993. Dr. Saxe became GateField’s Chief Executive Officer in February 1999 and served in that capacity until Actel Corp. acquired GateField in November 2000. Dr. Saxe holds a B.S.E.E. degree from North Carolina State University, and an M.S.E.E. degree and a Ph.D. in Electrical Engineering from Stanford University.
Owen Bateman joined QuickLogic in February 1997. Mr. Bateman has served as our Vice President of Worldwide Sales since April 2022. Prior to this role, Mr. Bateman served as QuickLogic’s Senior Director of Sales EMEA and USA from 2013 to 2022, and Strategic Accounts, Direct Sales and Channel Sales from 1997 to 2013. Prior to joining QuickLogic, Mr. Bateman held sales and field application engineering positions at Intel and Abacus Polar. Mr. Bateman spent several years in an ASIC design team and completed several successful FPGA and custom ASIC designs. Mr. Bateman holds a Higher National Certificate in Electronic and Microelectronic Engineering from Brooklands College, England.
Andrew Jaros joined QuickLogic in December 2024 as Vice President of IP Sales, bringing over 20 years of leadership experience in semiconductor IP, embedded systems, and business development. Prior to joining QuickLogic, Mr. Jaros most recently served as FlexLogix's World-Wide Vice President of Sales, Marketing, and Solutions Architecture from 2016 to 2024. Prior to joining FlexLogix, Mr. Jaros served eleven years in various management and leadership roles licensing ARC processor IP at Synopsys, Virage Logic, and ARC International. Prior to that, Mr. Jaros managed a sales team covering North America strategic accounts for ARM. Mr. Jaros started his career as a territory manager for Motorola Semiconductor and holds a B.S. degree in Chemical Engineering from Arizona State University.
Information regarding the backgrounds of our directors is hereby incorporated by reference from our definitive Proxy Statement relating to the 2026 Annual Meeting of Stockholders, which Proxy Statement is anticipated to be filed within 120 days after the end of the Fiscal Year covered by this Annual Report.
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