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Item 1. Business

2026-03-27 compared with 2025-03-26 · 217 added, 193 removed, 100 unchanged (80% of the section changed)

QuickLogic Corporation was founded in 1988 and reincorporated in Delaware in 1999.

We provide innovative, programmable silicon and software platforms to enable our customers to develop custom hardware products in a fast time-to-market and cost-effective way.

Specifically, we are a fabless semiconductor company with a variety of products:

embedded FPGA ("eFPGA") intellectual property ("IP"), low power, multi-core semiconductor system-on-chips ("SoCs"), discrete FPGAs, and AI software.

Our customers can use our eFPGA IP for hardware acceleration and pre-processing in their Application Specific Integrated Circuit (ASIC) products, our SoCs to run our customers' software and build their hardware around, and our discrete FPGAs to implement their custom functionality.

The Analytics Toolkit from SensiML Corporation ("SensiML"), our wholly-owned subsidiary, provides an end-to-end Artificial Intelligence / Machine Learning solution with accurate sensor algorithms using AI technology.

The full range of products, software tools, and eFPGA IP enables the practical and efficient field programmability for our customers across Aerospace and Defense, Consumer/Industrial IoT, and Consumer Electronics markets.

Our new products include the following:

eFPGA IP Licensing business, associated professional services, consisting of development and integration of eFPGA technology into custom semiconductor solutions, and our silicon products consisting of EOS™, QuickAI™, ArcticLink® III, PolarPro®3, PolarPro II, PolarPro, and Eclipse II products.

In addition to delivering our own semiconductor solutions, our new products category includes our AI/ML Software Platform from our wholly-owned subsidiary company, SensiML, which includes Software as a Service (SaaS) subscriptions for development, per unit license fees when deployed in production, and proof-of-concept services, all of which are also included in the new products revenue category.

Our mature products include primarily FPGA families named PASIC®3 and QuickRAM®, as well as programming hardware and design software.

For our IP and silicon platforms, we collaborate with multiple partners on co-marketing and/or co-selling initiatives.

These partners could have primary business lines in semiconductor IP, Design Services, semiconductor foundry, semiconductor assembly and test, and others.

For our AI/ML Software, SensiML collaborates with several microcontroller and sensor manufacturers to integrate the microcontroller and/or sensor manufacturers’ development kits with SensiML’s Analytics Toolkit in order to showcase combined solutions for AI/ML applications.

Currently, these collaborations include On Semiconductor Corp., Microchip Technology Inc., Silicon Laboratories, Inc., Arduino, NXP Semiconductors N.V., Raspberry Pi, and Nordic Semiconductor.

Our eFPGA IP is currently developed on 12nm, 16nm, 22nm, 28nm, 40nm, 65nm, 90nm, 130nm, and 250nm process nodes with a roadmap to more advanced, sub-10nm nodes.

The licensable IP is generated by our automated compiler tool called Australis™, which enables our engineers to create an eFPGA IP for our licensees that they can then integrate into their SoC without significant involvement by QuickLogic.

We believe this flow enables a scalable development and support model for QuickLogic.

For our eFPGA strategy, we typically work with semiconductor manufacturing partners prior to this IP being licensed to a SoC company.

We have changed our manufacturing strategies to reduce the cost of our silicon solution platforms to enable their use in a range of unique products ranging from low to high volume.

Our EOS S3, EOS S3AI, QuickAI and ArcticLink III silicon platforms combine mixed signal physical functions and hard-wired logic alongside our field programmable logic.

Our EOS S3, EOS S3AI, and ArcticLink III solution platforms are manufactured on process nodes where we can benefit from smaller die sizes and lower power consumption.

We typically implement sophisticated logic blocks and mixed signal functions in hard-wired logic because it is very cost-effective and energy efficient.

We use small form factor packages, which are less expensive to manufacture and include smaller pin counts.

Reduced pin counts result in lower costs for our customers' printed circuit board space and routing.

Furthermore, our SRAM reprogrammable silicon platforms can be programmed in-system by our customers, and therefore, we do not incur programming costs, lowering the overall cost of ownership to our customers.

We expect to continue to invest in silicon solution platforms and manufacturing technologies that make us competitive for the variety of markets and applications that programmable logic serves.

In order to grow our revenue from its current level, we depend upon increased revenue from our new products, including existing new product platforms and platforms currently in development.

We expect our business growth to be driven mainly by eFPGA IP and our silicon solutions.

Therefore, our revenue growth needs to be strong enough to enable us to sustain profitability while we continue to invest in the development, sale, and marketing of our new solution platforms, IP, and software.

QuickLogic Corporation was founded in 1988 and completed its reincorporation in Delaware in 1999.

We develop programmable logic semiconductor technologies, including embedded Field Programmable Gate Array ("eFPGA") intellectual property ("IP") and specialized FPGA devices used in a range of applications requiring adaptable hardware functionality.

Our technologies enable customers to incorporate programmable logic into custom semiconductor devices or deploy standalone programmable devices to implement system control, hardware acceleration, and other configurable functions.

We are a fabless semiconductor company whose primary offerings include eFPGA IP licensing, discrete FPGA devices, and related development tools and software.

Semiconductor companies license our eFPGA IP to integrate programmable logic blocks into their application-specific integrated circuits ("ASICs") and system-on-chip ("SoC") devices.

Our discrete FPGA devices enable customers to implement custom hardware functionality in applications requiring flexibility, low power consumption, and long product life cycles.

Our programmable logic technologies are used in a variety of markets, including aerospace and defense, industrial and infrastructure systems, data processing and computing platforms, and certain embedded and edge computing applications.

The combination of programmable silicon technologies, software tools, and design resources enables customers to efficiently incorporate field-programmable hardware capabilities into both custom silicon and system-level products.

Certain of our programmable logic technologies are designed for applications requiring deterministic hardware operation, security, and long operational lifetimes, including aerospace, defense, and industrial systems, where reliable electronics are critical to system performance.

We also support government-sponsored initiatives focused on strengthening trusted microelectronics capabilities and advancing radiation-tolerant programmable logic technologies used in aerospace, defense, and other mission-critical systems.

Our current product offerings include our eFPGA IP licensing business and associated professional services, which consist of development and integration of eFPGA technology into customer semiconductor devices, as well as a range of FPGA silicon products, including EOS™, ArcticLink® III, PolarPro®3, PolarPro II, PolarPro®, and Eclipse II products.

Our mature products include FPGA families such as PASIC®3 and QuickRAM®, as well as programming hardware and design software tools that support the development and deployment of programmable logic designs.

We collaborate with a range of ecosystem partners on co-marketing, co-selling, and technology initiatives supporting our IP and silicon platforms.

These partners include semiconductor IP providers, semiconductor design service companies, semiconductor foundries, semiconductor assembly and test providers, and other technology companies that support the development and deployment of programmable silicon solutions.

Our eFPGA IP is currently developed across a range of semiconductor manufacturing process technologies, including Intel 18A and process nodes such as 12nm, 16nm, 22nm, 28nm, 40nm, 65nm, 90nm, 130nm, 250nm, and 350nm with a roadmap targeting additional advanced semiconductor nodes.

Our licensable IP is generated using our automated IP generator tool, Australis™, which enables the creation of customized eFPGA IP architectures that can be integrated into customer ASIC and SoC designs.

This automated architecture generation capability allows customers to incorporate programmable logic into custom semiconductor devices with limited ongoing development involvement from QuickLogic, enabling a scalable IP licensing model.

As a fabless semiconductor company, we rely on third-party semiconductor foundries and manufacturing partners to fabricate, assemble, and test our silicon products.

We work with multiple manufacturing partners to support a range of product volumes and applications, including the development of certain programmable logic technologies designed for use in semiconductor manufacturing environments operated within the United States.

Our EOS S3™ and ArcticLink® III silicon platforms combine mixed-signal physical functionality and fixed-function logic alongside programmable logic resources.

Integrating these capabilities allows customers to implement cost-effective and energy-efficient system architectures while retaining the flexibility of programmable hardware.

These platforms are designed to take advantage of semiconductor manufacturing nodes that enable reduced power consumption and smaller die sizes.

For cost-sensitive applications, we utilize small form-factor packaging options that reduce device cost and minimize printed circuit board space requirements for customers.

For applications requiring enhanced environmental reliability, including certain aerospace and defense systems, we support packaging options designed for ruggedized operating environments.

We expect that future revenue growth will depend on the continued adoption of our eFPGA IP technologies, the introduction of new FPGA devices, and the ongoing demand for our existing programmable logic products.

Our growth strategy includes expanding our eFPGA IP business, developing additional programmable logic devices and architectures, and supporting the integration of programmable logic technologies into a broad range of semiconductor and system-level applications.

Available Information

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A copy of our Code of Conduct and Ethics is posted on our website at https://ir.quicklogic.com/governance-docs.

Any changes to or waiver from this Code of Conduct and Ethics will be posted to this page on our website.

Any amendments to or waiver from this Code of Conduct and Ethics will be posted to this page on our website.

Our fiscal year ends on the Sunday closest to December 31.

References to Fiscal Years 2024, 2023, and 2022 refer to the Fiscal Years ended December 29, 2024 , December 31, 2023 , and January 1, 2023 , respectively.

References to Fiscal Years 2025 and 2024 refer to the Fiscal Years ended December 28, 2025 and December 29, 2024 , respectively.

Industry Background

Historically, system processing capability was built using a homogenous architecture, meaning one that consisted of the use of only one type of technology.

This could be one or more instances of a single processor type, or only programmable logic.

More recently, there is a general trend in the semiconductor market that enhanced processing capability can come from the adoption of more heterogeneous architectures.

Examples of this trend are the inclusion of one or more general purpose processor cores (e.g., Arm or RISC-V) in conjunction with programmable logic.

This type of architecture enables the end user to partition their application workloads across the heterogeneous cores so that the most appropriate core is used for a given workload, often concurrently.

Generally, this is viewed as the most optimal way to design systems that need to optimize for performance or battery life.

The heterogeneity can be implemented as multiple discrete devices on a Printed Circuit Board (PCB), multiple IP cores in a monolithic device, or as multiple devices (e.g., chiplets) integrated into an advanced package.

An important underlying trend for the Aerospace and Defense, and Industrial markets is that there is a need for a high degree of fragmentation of system functionality.

This drives a need for a time and cost-efficient product development flow while maintaining the ability to extend the life cycle of a given design through design changes and uniquely optimize designs for new workloads and/or algorithms that need to be deployed (e.g., deploying more advanced AI algorithms in the future).

Development time and non-recurring engineering ("NRE") costs tend to be more of the focus for hardware products in these markets rather than the bill of materials cost.

We believe these industry trends are shifting the demand among different classes of core silicon.

The following are the four main classes of non-memory core silicon:

Microcontrollers ("MCUs") are typically small, low-power hardware products on a single integrated circuit that contain a processor core, memory, and a number of peripherals.

They are designed to be programmed with software for embedded applications;

Application Specific Standard Products ("ASSPs") other than processors, are fixed-function hardware products designed to address a relatively narrow set of applications.

These hardware products typically integrate a number of common peripherals or functions, and the functionality of these hardware products is fixed prior to wafer fabrication;

Programmable Logic Devices ("PLDs") are general-purpose hardware products, which can be used by a variety of electronic systems manufacturers and are customized after purchase for a specific application.

FPGAs are a subset of PLDs and are typically used to implement complex system functions;

Application Specific Integrated Circuits ("ASICs") are custom hardware products designed and fabricated to meet the needs of one specific application for one end-customer.

Structured ASICs, a sub-category of ASICs, provide a limited amount of custom content to broaden the applicability of a device for additional applications.

ASSPs are offered broadly to the market, making it challenging for a system designer to create differentiated products from these hardware products alone.

In many situations, the available ASSPs may not directly implement the desired function and the system designer is required to use a combination of ASSPs to achieve the desired result at the expense of increased cost, product size, and power consumption.

As standards evolve or new standards are developed, ASSPs may not be available to implement desired functions.

System designers can customize their products using programmable logic, ASICs, or MCUs.

The competitive dynamic between these classes of core silicon is well understood.

High development risks, development costs, and opportunity costs are incurred when using ASICs to produce custom hardware products with either very low unit production cost or unique functionality that is only achievable with a customer ASIC solution.

Suppliers of programmable logic hardware products, which have lower development and market risks and development costs relative to ASICs, have aggressively reduced the unit cost of their products over time, making programmable logic hardware products the solution of choice for custom products unless the volume is very high or the functionality and/or operating environment is unique.

These cost reduction efforts have significantly increased the volume required to justify the total cost of an ASIC.

Field Programmable Gate Array ("FPGA") technology has been used historically by system companies and OEMs to develop and deploy customer-specific functionality with fast time-to-market and low development costs.

End market use includes Aerospace and Defense, Industrial, Computing, Communications, IoT, and Consumer.

According to a recent research report published by Markets and Markets, the FPGA market was valued at $12.1 billion in 2024 and is projected to reach $25.8 billion by 2029, growing at a CAGR of 16.4% during the forecast period from 2024 to 2029.

Additionally, according to SNS Insider, the military and aerospace segment is expected to grow at the fastest CAGR, fueled by the adoption of embedded FPGAs.

High-density FPGAs provide advanced levels of integration, reliability, and low-leakage power consumption required for high-performance aviation and defense applications.

The emergence of embedded field programmable gate array IP technology ("eFPGA IP") has particularly favored the aerospace and defense industry by offering even better integration, reliability, and low power options over the use of traditional discrete FPGAs.

The Aerospace and Defense and Industrial markets are well served by existing core silicon or custom ASIC development.

Although much of these markets' uses are generally not as price, power, and size sensitive, there are use cases for reducing size, weight, and power.

When there is a strong need for a custom solution to address specific functionality or operating environment (e.g., high radiation, extended temperature ranges, etc.), designers often turn to discrete FPGAs, or in some cases when standard FPGAs do not exist, an ASIC.

QuickLogic FPGAs have a loyal following in certain segments of these markets, particularly when instant-on, energy efficiency, high reliability, or intellectual property security is important.

Since 2022, QuickLogic has also entered into multiple, large eFPGA-related contracts with customers in the Aerospace and Defense market and expects to continue to do so in the future.

Historically, the Defense market has followed QuickLogic’s mature products revenue trend, but recent advancements in QuickLogic’s Australis IP generator tool, the recent Strategic Radiation Hardened FPGA contract for the U.S.

Department of Defense, participation in the DARPA Toolbox, and other eFPGA-related contracts with the Defense Industrial Base have enabled renewed interest from customers in this area.

Consequently, QuickLogic expects these trends to be a primary growth driver.

Historically, system processing capability was built using a homogeneous architecture consisting primarily of a single type of processing technology, such as a general-purpose processor or programmable logic device.

In recent years, semiconductor system architectures have increasingly adopted heterogeneous processing models that combined multiple types of compute resources.

Examples include the integration of one or more general purpose processor cores (such as Arm® or RISC-V) together with programmable logic or specialized hardware accelerators.

These heterogeneous architectures allow system designers to partition application workloads across different types of compute resources so that each workload is executed on the most efficient processing element.

This approach often improves system performance, energy efficiency, and flexibility.

Heterogeneous architectures can be implemented in several ways, including the use of multiple discrete semiconductor devices on a printed circuit board, multiple integrated IP blocks within a monolithic semiconductor device, or multiple semiconductor devices (such as chiplets) integrated together within an advanced package.

These approaches allow system designers to combine different processing technologies to achieve the desired balance of performance, power consumption, flexibility, and cost.

An important underlying trend in the aerospace and defense and industrial markets is the increasing fragmentation and specialization of system functionality.

System designers in these markets often require hardware solutions that can be rapidly developed, modified, and extended over long product life cycles while supporting evolving algorithms, communications protocols, and application requirements.

As a result, system developers increasingly prioritize development time, design flexibility, and non-recurring engineering ("NRE") costs over the lowest possible bill of materials cost.

We believe these industry trends are influencing the relative demand among several classes of core semiconductor technologies.

The primary classes of non-memory semiconductor devices include the following:

Microcontrollers ("MCUs") are typically low-power integrated circuits containing a processor core, memory, and peripheral interfaces designed for embedded applications programmed primarily through software;

Application Specific Standard Products ("ASSPs") , other than processors, are fixed-function semiconductor devices designed to perform specific hardware functions.

These devices often integrate a set of commonly used peripherals or functions and are typically optimized for particular applications.

Their functionality is fixed prior to fabrication;

Programmable Logic Devices ("PLDs") are general-purpose semiconductor devices that can be configured by system designers after fabrication to implement application-specific hardware functionality.

FPGAs are a subset of PLDs that are commonly used to implement complex digital logic functions and system interfaces;

Application Specific Integrated Circuits ("ASICs") are custom semiconductor devices designed and fabricated to meet the requirements of a specific application for a specific customer.

Structured ASICs represent a sub-category that provides limited customization to broaden the applicability of the device across related applications.

ASSP devices are offered broadly to the market and typically implement standardized functionality.

As a result, system designers may need to combine multiple ASSP devices to implement the desired system architecture, which can increase system cost, power consumption, and board complexity.

In addition, when standards evolve or new application requirements emerge, suitable ASSP devices may not yet exist to implement the desired functionality.

System designers can customize hardware functionality using programmable logic devices, ASICs, or software-programmable processors.

Each class of semiconductor device presents different trade-offs between development cost, unit cost, flexibility, and development risk.

ASICs may provide the lowest unit cost at high production volumes but typically involve significant development time, engineering cost, and design risk.

Programmable logic devices provide a lower development risk and faster time-to-market because functionality can be configured after fabrication.

As programmable logic technologies have evolved and device costs have declined over time, the production volumes required to justify a fully custom ASIC solution have increased.

FPGA technology has historically enabled system designers to develop and deploy application-specific hardware functionality with relatively fast development cycles and lower upfront engineering costs compared to ASICs.

FPGAs are widely used across multiple end-markets, including aerospace and defense, industrial systems, computing, communications, embedded systems, and consumer electronics.

According to a recent research report published by Markets and Markets, the global FPGA market was valued at approximately $11.7 billion in 2025 and is projected to grow to approximately $19.3 billion by 2030, reflecting continued adoption of programmable logic technologies across a range of markets.

Growth in the FPGA market is driven by increasing demand for hardware acceleration, adaptable system architectures, and the ability to support evolving algorithms and application requirements.

More recently, the emergence of eFPGA IP has expanded the use of programmable logic beyond discrete FPGA devices.

eFPGA technology allows semiconductor companies to integrate programmable logic blocks directly into ASIC and SoC devices, enabling designers to incorporate adaptable hardware acceleration and configurable functionality within custom silicon designs.

This approach can improve system integration, reduce latency, and enable post-silicon flexibility while maintaining the performance and power efficiency advantages of ASIC architectures.

The aerospace and defense and industrial markets often require semiconductor solutions capable of operating in demanding environments and supporting long product life cycles.

In these markets, system designers frequently require specialized functionality, extended temperature operation, radiation tolerance, and high reliability.

When suitable standard semiconductor devices are not available, designers may turn to programmable logic devices or custom ASIC development to meet these requirements.

QuickLogic FPGA technologies have historically been used in certain segments of these markets where characteristics such as instant-on operation, energy efficiency, deterministic hardware behavior, and protection of intellectual property are important.

In addition, we have increasingly focused on providing programmable logic technologies that support mission-critical applications requiring secure and reliable hardware operations.

Since 2022, QuickLogic has also entered into multiple contracts related to embedded FPGA technologies with customers servicing the aerospace and defense market.

Advances in our Australis IP generator technology, participation in industry technology ecosystems, and the development of programmable logic technologies designed for demanding operating environments have contributed to increased engagement with customers in the defense industrial base.

We believe these trends may support continued growth opportunities for programmable logic technologies in aerospace, defense, and other mission-critical markets.

Markets and Product Technology

We market our programmable logic (FPGAs and eFPGA IP) solutions primarily to Defense Industrial Base contractors, U.S.

Government entities, System OEMs, and fabless semiconductor companies.

These customers may value one or more of our product categories.

A solution can be based on our programmable technology, which enables customized designs, low power, flexibility, rapid time-to-market, longer time-in-market, and lower total cost of ownership.

We are capable of providing complete solutions because of our investment in developing the low power IP and software required to implement specific functions.

In some cases, we develop the IPs and either software or firmware ourselves and, in other cases, we utilize third parties to develop the mixed signal physical layers, logic, and/or software.

By using our silicon platforms, our IPs, our software, and our in-depth architecture knowledge, we can deliver energy efficient custom solutions that blend the benefits of traditional ASSPs with the flexibility, product proliferation, differentiation, and low total cost of ownership advantages of programmable logic.

Our product technology consists of five major elements:

We market our programmable logic technologies, including FPGA devices and eFPGA IP, primarily to Defense Industrial Base contractors, U.S.

Government entities, system original equipment manufacturers ("OEMs"), and fabless semiconductor companies.

These customers utilize our programmable logic technologies to incorporate adaptable hardware functionality within system-level designs or custom semiconductor devices.

Our technologies enable customers to implement customized hardware functionality while supporting characteristics such as low power consumption, design flexibility, rapid development cycles, long product life cycles, and reduce total cost of ownership.

Depending on customer requirements, solutions may incorporate our programmable logic technologies together with semiconductor IP, software tools, and design resources that support the development and deployment of programmable hardware functionality.

Through the use of our programmable silicon platforms, semiconductor IP, software tools, and architecture expertise, we support the development of energy-efficient hardware solutions that combine the benefits of fixed-function semiconductor devices with the flexibility and adaptability of programmable logic technologies.

In certain cases, we develop IP, software, or firmware internally, while in other cases, we collaborate with third parties to integrate mixed-signal interfaces, logic functions, or software components required to complete a customer solution.

Our product technology consists of four major elements:

Programmable Logic Technology

Our programmable logic enables our customers to customize their hardware platforms.

We have two distinct types of programmable logic – Reprogrammable and One-Time Programmable ("OTP").

Within our Reprogrammable logic architecture, we can utilize standard foundry processes (e.g., CMOS-logic process with foundry-provided SRAM memory elements) or more unique processes (e.g., foundry-provided CMOS logic processes and third-party-provided memory elements (e.g., MRAM)).

We can choose the appropriate process technology based on our customers’ requirements.

Our SRAM-reprogrammable logic is the basis of our eFPGA IP License initiative and is the logic used in our EOS S3, EOS S3 LV, and EOS S3AI products.

An example of the unique process combination is when we use foundry-provided CMOS with MRAM in the Strategic Radiation Hardened FPGA program for which we are the prime contractor.

The second type of programmable logic is our ViaLink® OTP technology.

ViaLink is our proprietary and patented technology and possesses the characteristics of non-volatility and instant-on, very low standby power, low dynamic power, and small form factor.

Our programmable logic technologies enable our customers to customize hardware functionality within semiconductor devices or system-level platforms.

We support two primary classes of programmable logic architectures:

reprogrammable logic and one-time programmable ("OTP") logic.

Reprogrammable logic architectures allow hardware functionality to be configured and updated after manufacturing.

Our reprogrammable programmable logic technology is primarily based on SRAM configuration elements and forms the foundation of our eFPGA IP and certain programmable logic silicon devices.

These architectures can be implemented using standard semiconductor foundry process technologies, including conventional CMOS logic processes that incorporate foundry-provided SRAM memory elements.

In certain specialized applications, reprogrammable logic architectures may incorporate alternative non-volatile memory technologies such as magnetoresistive random-access memory ("MRAM").

These architectures can support operating environments that require enhanced reliability characteristics, including certain radiation-tolerant applications.

Our second class of programmable logic technology is our ViaLink® OTP architecture.

ViaLink is a proprietary and patented antifuse-based programmable logic technology that provides non-volatility, instant-on operation, very low standby power consumption, low dynamic power, and compact device form factors.

OTP architectures are commonly used in applications requiring secure and deterministic hardware operation.

Semiconductor Intellectual Property

We develop semiconductor intellectual property (IP) cores for licensing to our customers or for use within our own devices.

Licensable eFPGA IP based on our Field Programmable Gate Array technology is called “embedded FPGA IP”.

The eFPGA IP is generated by our automated IP compiler tool called Australis™, which enables our engineers to create an eFPGA IP for our licensees that they can then integrate into their SoC without significant involvement by us.

We believe this flow enables a scalable development and support model for our company.

Additionally, we may develop and provide other IP blocks that our customers can use in conjunction with our eFPGA IP, such as signal processing / digital filter functions, hardware acceleration, processor offloading, and various bus interface functions.

We develop semiconductor IP cores that may be licensed to customers or integrated into our own programmable logic devices.

Our licensable programmable logic IP is referred to as eFPGA IP.

Our eFPGA IP enables semiconductor companies to integrate programmable logic blocks directly into ASICs or SoC devices.

This capability allows customers to incorporate adaptable hardware acceleration, system control functions, and configurable digital logic within custom semiconductor designs.

Our eFPGA IP architectures are generated using our automated IP generator tool, Australis™, which enables the creation of customized programmable logic architectures that can be integrated into customer semiconductor designs.

The Australis™ architecture generation process allows our customers to incorporate programmable logic functionality with limited ongoing development involvement from QuickLogic, supporting a scalable IP licensing and support model.

In addition to programmable logic architectures, we may also provide other IP blocks that customers can integrate alongside eFPGA IP within their designs.

These may include signal processing functions, digital filtering blocks, hardware acceleration functions, processor offload engines, and various interface and bus connectivity components.

FPGA User Tools

We develop, maintain and support software tools that our customers use to program their designs into our FPGA, eFPGA IP, and SoC products.

By design, all programmable logic technology is unconfigured in its default state after manufacturing.

Designers using programmable logic must configure the state of the programmable logic to match their requirements;

this is accomplished by a suite of tools commonly referred to as FPGA User Tools.

There are two such categories of FPGA User Tools – proprietary and open-source.

Historically, FPGA/eFPGA vendors have provided only proprietary versions of these tools to their customers.

For our Mature products, we continue to support a 100% proprietary FPGA User Tool.

For our new products and eFPGA IP, we support a 100% open-source version, as well as a hybrid FPGA User Tool called Aurora that combines open-source and proprietary technology, including logic synthesis via Synopsys's Synplify® product.

We develop and support software tools that enable customers to design, configure, and deploy programmable logic functionality within our FPGA devices, eFPGA IP architectures, and programmable silicon platforms.

As programmable logic devices are manufactured in an unconfigured state, system designers must configure the programmable logic resources to implement their desired hardware functionality using a set of design and programming tools commonly referred to as FPGA User Tools.

Our FPGA User Tools support two general approaches:

proprietary development tools and open-source tool flows.

Historically, FPGA vendors have provided proprietary tool chains to support device configuration and design development.

For certain mature products, we continue to support proprietary FPGA development tools.

For our newer programmable logic platforms and eFPGA IP technologies, we support open-source FPGA development flows, as well as hybrid tool environments.

Our Aurora development platform combines open-source FPGA development tools with selected proprietary technology elements, including logic synthesis capabilities based on industry-standard synthesis tools.

This approach enables customers to use a flexible development environment while maintaining compatibility with established semiconductor design workflows.

Silicon Platforms

We have two types of silicon platforms, discrete FPGAs and SoCs that embed FPGA technology.

We have a variety of discrete FPGAs – historically based on our ViaLink technology and more recently based on our Reprogrammable technology (either SRAM- or MRAM-based configuration).

We also have multiple silicon platforms that fall under the SoC category - ArcticLink, EOS S3, EOS S3 LV, and EOS S3AI.

Our SoC platforms combine mixed signal physical functions, hard-wired logic, and programmable logic on one device.

Adding hard-wired IP enables us to deliver more logic at lower cost and lower power, while the programmable logic allows us to provide solutions that can be rapidly customized to differentiate products, add features, and reduce system development costs.

This combination of mixed signal, hard-wired logic, and programmable logic enables us to deliver low cost, small form factor solutions that can be customized for a particular customer or market requirements while lowering the total cost of ownership.

Artificial Intelligence / Machine Learning (AI/ML) Software

Through our wholly-owned subsidiary company, SensiML, we develop and optimize an end-to-end software suite that provides developers with a practical means for developing IoT sensor algorithms using AI.

Each component of the software suite handles specific steps to progress from initial raw sensor data collection using prototype hardware to optimized firmware code generation, validation and testing, and post-ship algorithm updates and continuous learning enhancements.

SensiML Data Studio (formerly the Data Capture Lab) is a full-featured client tool that enables rapid, efficient, and collaborative multi-user data collection, cleansing, labeling, and metadata annotation of custom application datasets.

SensiML Analytics Studio is a cloud service component that uses labeled datasets to deliver device-optimized firmware for a chosen endpoint product.

SensiML Test App is used to quickly and efficiently validate final device firmware and test for the proper behavior, accuracy, and performance of the algorithm empirically on actual endpoint hardware.

Lastly, the SensiML Application Programmer’s Interface ("API") is a simplified interface to extend the SensiML algorithms and manage advanced features like edge model tuning and continuous learning updates to the cloud.

We offer programmable silicon platforms that include both discrete FPGA devices and SoC devices incorporating programmable logic resources.

Our discrete FPGA devices have historically been based on our ViaLink® OTP programmable logic technology and more recently, also incorporate reprogrammable programmable logic architectures using SRAM or other memory technologies for configuration.

In addition to standalone FPGA devices, we develop silicon platforms that integrate programmable logic together with fixed-function hardware blocks and mixed-signal capabilities.

These SoC platforms include products such as ArcticLink®, EOS S3™, EOS S3 LV™, and EOS S3AI™.

By integrating programmable logic together with hard-wired logic blocks and mixed-signal functions, these platforms allow customers to implement energy-efficient system architectures while retaining the flexibility to customize hardware functionality through programmable logic.

Hard-wired IP blocks provide optimized performance and power efficiency for commonly used functions, while the programmable logic fabric enables customers to adapt the platform to specific application requirements.

This combination of programmable logic, fixed-function hardware, and mixed-signal capabilities enables us to deliver semiconductor solutions that can be customized for a variety of application requirements while supporting reduced system complexity, lower power consumption, and efficient system integration.

Competitive Strengths

We believe several characteristics of our technology and business model differentiate us within the programmable logic and semiconductor IP markets, including:

Programmable Logic Expertise

QuickLogic has developed programmable logic technologies over several decades and we have extensive experience in the design and deployment of FPGA architectures and related development tools.

Our experience spans multiple semiconductor process technologies, programmable logic architectures, and end markets that require adaptable hardware functionality.

Embedded FPGA Intellectual Property Platform

Our eFPGA IP enables semiconductor companies to integrate programmable logic blocks into ASICs and SoC devices.

This capability allows customers to incorporate configurable hardware functionality within custom semiconductor designs while maintaining the performance and power advantages of ASIC architectures.

Our automated IP generation platform, Australis™, enables the development of customized programmable logic architectures for integration into customer designs.

This automated architecture generation capability allows us to support a scalable IP licensing model while enabling customers to efficiently integrate programmable logic into their semiconductor products.

Flexible Programmable Logic Architectures

Our programmable logic technologies support multiple configuration approaches, including reprogrammable architectures and OTP architectures.

These architectures enable customers to select programmable logic technologies that best meet their requirements in flexibility, power consumption, security, and reliability.

Long Life Cycle and Mission-Critical Applications

Certain of our programmable logic technologies are used in applications requiring long product life cycles, deterministic operation, and reliable system behavior.

These characteristics are important in markets such as aerospace and defense, industrial systems, and infrastructure applications where systems may operate for extended periods and hardware reliability is critical.

Scalable Ecosystem and Development Tools

We support our programmable logic technologies with development tools and software platforms that allow customers to design and deploy hardware functionality using our FPGA devices and eFPGA IP architectures.

Our support for both proprietary and open-source development flows enables customers to integrate programmable logic functionality within established semiconductor and system design workflows.

Fabless Manufacturing Model

As a fabless semiconductor company, we utilize third-party foundries, assembly providers, and testing partners to manufacture our silicon devices.

This model allows us to leverage advanced semiconductor manufacturing technologies without maintaining internal wafer fabrication facilities, enabling us to focus our resources on programmable logic architecture development and customer engagement.

Marketing, Sales, and Customers

We monetize our technology through hardware product sales and eFPGA IP licenses, with any necessary corresponding work delivered via professional engineering services, SensiML Analytics Toolkit subscriptions, and per unit royalties.

We specialize in enabling field programmability of our customers' systems - ether via our discrete Field Programmable Gate Array devices or our eFPGA IP.

For our customers, we enable hardware programmability cost-effectively and at low power.

Our embedded FPGA technology gives ASIC and SoC developers the benefit of flexibility to make post-manufacturing design changes at very fast time-to- and time-in-market, while keeping power consumption low.

Our multi-core sensor processing products such as ArcticLink 3 S1, ArcticLink 3 S2, EOS 3, EOS S3 LV, and EOS S3AI provide an extremely power-efficient approach for real-time multi-modal (vision, motion, voice, location, biometric, and environmental) sensor processing independently of the cloud.

Our SensiML Analytics Toolkit is cutting-edge software that enables ultra-low power IoT endpoints that implement AI to transform raw sensor data into meaningful insight at the device itself.

The Toolkit also provides an end-to-end development platform spanning data collection, labeling, algorithm and firmware auto generation, and testing.

We monetize our programmable logic technologies primarily through the sale of FPGA semiconductor devices and the licensing of eFPGA IP.

In connection with eFPGA IP licensing engagements, we may also provide professional engineering services to support the integration of programmable logic technology into customer semiconductor designs.

In certain cases, our licensing arrangements may include royalty payments based on customer production volumes.

Our technologies enable customers to incorporate adaptable hardware functionality into semiconductor devices or system-level products.

Customers utilize our programmable logic technologies either through our discrete FPGA devices or by integrating our eFPGA IP directly into ASICs or SoC designs.

These technologies allow system designers to implement hardware acceleration, system control functions, and configurable digital logic while maintaining low power consumption and design flexibility.

eFPGA technology provides ASIC and SoC developers with the ability to incorporate programmable hardware functionality directly within custom semiconductor devices.

This capability enables designers to support evolving application requirements, implement hardware acceleration functions, and reduce the risk associated with fixed-function semiconductor architectures.

We recognize that many of our target markets require integrated hardware solutions that combine programmable logic with other semiconductor and system technologies.

Accordingly, we collaborate with a range of industry partners to develop solutions that incorporate programmable silicon platforms, semiconductor IP, packaging technologies, development tools, and other supporting technologies.

These collaborations allow us to support the performance, power efficiency, form factor, and life cycle requirements of our customers' systems.

We recognize that our markets require a range of solutions, and we intend to work with market-leading companies to combine silicon solution platforms, packaging technology, FPGA User Tools, sensor software algorithms, software drivers, and firmware, to meet the product proliferation, high bandwidth, time-to-market, time-in-market, and form factor requirements of our customers.

We intend to continue to define and implement compelling solutions for our target customers and partners.

We believe our solutions are resonating with our target customers who value lower power consumption, platform design flexibility, rapid time-to-market, longer time-in-market, and low total cost of ownership available through the use of our solutions.

We sell our products through a network of sales channel partners and direct sales executives in North America, Europe, and Asia.

In addition to our corporate headquarters in San Jose, California, we have international sales operations in Japan and the United Kingdom.

Our sales personnel and independent sales representatives are responsible for sales and application support for a given region, focusing on major strategic accounts, and managing our channel sales partners, such as distributors.

Customers typically order our FPGA products through our distributor s.

Currently, we have fourteen active distributors in North America and a network of nineteen active distributors and sales representatives throughout Eu rope and Asia to support our international business.

eFPGA IP customers and SensiML SaaS subscribers typically enter into licensing agreements directly with QuickLogic and SensiML, respectively.

We also have an Aerospace and Defense, Industrial, and IoT product customer base that purchases our mature silicon products.

We expect to continue to offer silicon hardware products to these customers, as well as new eFPGA IP for when these customers choose to implement their own silicon platform solution.

One customer represented approximately 54% of our total revenue for the year ended December 29, 2024 .

One customer represented 70% of our total revenue f or the year ended December 31, 2023 .

In addition, a noteworthy portion of our revenue comes from sales to customers located outside of the United States.

We believe our programmable logic technologies address several important requirements for system designers, including low power consumption, platform flexibility, rapid development cycles, extended product life cycles, and reduced total cost of ownership.

We sell our products through a combination of direct sales personnel and sales channel partners in North America, Europe, and Asia.

Our direct sales organization focuses on strategic customer engagements and technical support, while our channel partners and distributors support product availability and regional sales activities.

In addition to our corporate headquarters in San Jose, California, we maintain international sales operations in Japan and the United Kingdom.

Customers typically purchase our FPGA devices through authorized distributor s.

We currently work with a network of distributors in North America, Europe, and Asia to support our global sales activities.

C ustomers licensing our eFPGA IP generally enter into licensing agreements directly with QuickLogic.

We serve customers across several markets, including aerospace and defense, industrial systems, computing platforms, and semiconductor companies developing custom ASIC or SoC devices.

Certain customers in aerospace, defense, and industrial markets continue to utilize our existing FPGA device platforms, while semiconductor companies increasingly license our eFPGA IP to integrate programmable logic into custom semiconductor designs.

One customer represented approximately 44% and another customer represented approximately 11% of our total revenue from continuing operations for the year ended December 28, 2025 .

One customer represented 56% of our total revenue from continuing operations f or the year ended December 29, 2024 .

In addition, a significant portion of our revenue is derived from customers located outside the United States.

See Note 15 to the consolidated financial statements for additional information.

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Development contracts can span several months to several quarters in duration.

A number of companies offer products that compete with one or more of our semiconductor products and solutions.

Competitors of our eFPGA semiconductor IP include small, venture-backed startup companies.

In 2024, Analog Devices acquired the assets and technology of our most noteworthy eFPGA competitor, FlexLogix.

Competitors of our low power discrete FPGA devices include suppliers of low-density FPGAs such as Lattice Semiconductor Corp.

and Microsemi Corp.

(a subsidiary of Microchip Technology Inc.).

Competitors for our Aerospace and Defense discrete FPGAs include conventional FPGAs suppliers such as Xilinx Inc.

(a subsidiary of Advanced Micro Devices, Inc.), Altera (a recent spin-off of Intel Corp.), and Microsemi Corp.

Competitors of our SensiML AI/ML Software business include several small, venture-backed startup companies.

The semiconductor industry is highly competitive and characterized by rapid technological change, evolving industry standards, and frequent new product introductions.

We compete with a range of semiconductor companies that provide programmable logic devices, semiconductor IP, or alternative technologies that can perform similar system functions.

In the market for eFPGA IP, our competitors include other semiconductor IP providers and technology companies developing programmable logic architectures for integration into ASICs and SoC devices.

These competitors may include both established semiconductor companies and smaller venture-backed companies.

In the market for discrete FPGA devices, we compete with suppliers of programmable logic devices including Lattice Semiconductor Corporation, Microchip Technology Inc.

(which acquired Microsemi Corporation), Advanced Micro Devices, Inc.

(which acquired Xilinx, Inc.), and Intel Corporation (whose programmable logic business operates under the Altera brand).

These companies offer a broad range of applications and performance requirements.

Competition within the programmable logic market is influenced by several factors, including product performance, power consumption, device density, development tools, IP availability, product life cycle support, and the ability to meet specific application requirements.

In certain applications, programmable logic devices also compete with alternative semiconductor solutions, including ASICs, ASSPs, and software-programmable processors.

We believe our programmable logic technologies compete effectively in applications that benefit from configurable hardware functionality, low power consumption, flexible system architectures, and long product life cycle support.

Research and Development

We are focused on developing our core programmable logic technology and software tools.

Our products combine our silicon platforms with our eFPGA IP, FPGA User Tools, software drivers, and other system software, and may include SensiML software for AI applications.

Our future success will depend largely on our ability to rapidly develop, enhance, and port to new foundry and process technology our eFPGA IP solutions, as well as continue to enhance and support our FPGA User Tools to meet emerging industry standards and satisfy changing customer requirements.

Further, our future success will depend on our ability to execute on current, large eFPGA IP and discrete FPGA development contracts, as well as win new ones.

We have made and expect to continue to make substantial investments in R&D.

Our R&D expenses were $6.5 million, or 33% of revenue, $6.4 million, or 30% of revenue, and $5.0 million, or 31% of revenue for the years ended December 29, 2024, December 31, 2023, and January 1, 2023, respectively.

Research and development expenses for the year ended December 29, 2024 reflect increases in employee salaries, depreciation, and financing arrangement expenses.

Our research and development activities are primarily focused on advancing our programmable logic technologies, including eFPGA IP, FPGA semiconductor devices, and associated software development tools.

Our solutions combine programmable silicon platforms with semiconductor IP, FPGA development tools, software drivers, and other supporting system software.

Our future success depends in large part on our ability to execute on existing development programs involving eFPGA IP technologies and FPGA devices, as well as securing additional design engagements with semiconductor and system companies seeking to integrate programmable logic technologies into their products.

We have made, and expect to continue to make, substantial investments in research and development ("R&D").

Our R&D expenses from continuing operations were $5.3 million, or 38% of revenue and $5.8 million, or 30% of revenue for the Fiscal Years ended December 28, 2025 and December 29, 2024, respectively.

Research and development expenses for the year ended December 28, 2025 reflect increases in employee compensation, depreciation, and expenses associated with financing arrangements.

Manufacturing

We have close relationships with third-party manufacturers for our customer commercial products for wafer fabrication, package assembly, and testing requirements to help us ensure stability in the supply of our products and to allow us to focus our internal efforts on product and solution design and sales.

In connection with commercial customers, we outsource commercial products wafer manufacturing, primarily to GlobalFoundries and Taiwan Semiconductor Manufacturing Company Limited ("TSMC").

We outsource our commercial product packaging primarily to Amkor Technology, Inc.

Integra Specialty Products, JCET Group Co.

Ltd., and Golden Altos Corp.

GlobalFoundries manufactures our EOS S3, EOS S3 LV, and EOS S3AI Sensor Platform in a 40 nm complementary metal oxide semiconductor ("CMOS") process, and PolarPro 3E, ArcticLink III VX and BX, and ArcticLink 3 S2 Sensor Hub, in a 65 nm CMOS process.

TSMC manufactures our PASIC 3, QuickRAM and certain QuickPCI products, using a 0.35 nm CMOS process.

TSMC also manufactures our Eclipse products on 0.25 micron CMOS process, and other products using a 65nm CMOS process on twelve-inch wafers.

We purchase products from GlobalFoundries and TSMC on a purchase order basis.

Outsourcing of commercial wafer manufacturing enables us to take advantage of the high-volume economies of scale offered by these suppliers.

We may establish additional commercial foundry relationships as such arrangements become economically useful or technically necessary.

In connection with U.S.

Government end-user customers, we are required to procure wafer fabrication, package assembly, and testing from sources that maintain Defense Microelectronics Activity accreditation from the U.S.

Department of Defense and maintain certain intellectual property security standards.

We outsource wafer manufacturing, packaging, and testing services to certified U.S.-owned and continental U.S.-based suppliers.

As a fabless semiconductor company, we rely on third-party manufacturing partners for wafer fabrication, package assembly, and device testing.

This approach allows us to leverage the manufacturing scale and process technologies of established semiconductor suppliers while focusing our internal resources on programmable logic architecture development, product design, and customer engagement.

For our commercial products, we outsource wafer fabrication primarily to GlobalFoundries and Taiwan Semiconductor Manufacturing Company Limited ("TSMC").

Packaging and assembly services for our commercial products are provided by third-party semiconductor assembly and test providers, including Amkor Technology, Inc.

Integra Technologies, Inc., and Golden Altos Corporation.

GlobalFoundries manufactures several of our programmable silicon platforms, including EOS S3™, EOS S3 LV™, and EOS S3AI™ devices using a 40-nanometer complementary metal oxide semiconductor ("CMOS") process, and PolarPro® 3E, ArcticLink® III VX and BX products using a 65-nanometer CMOS process.

We also have recently used GlobalFoundries 12nm process for a new FPGA device test chip.

TSMC manufactures certain of our mature FPGA products, including PASIC® 3 and QuickRAM® devices, using 0.35-micron CMOS process, and Eclipse® devices using a 0.25-micron CMOS process.

We purchase wafers from these suppliers primarily on a purchase order basis.

Outsourcing wafer fabrication allows us to benefit from the manufacturing scale, process technologies, and operational efficiencies of leading semiconductor foundries.

We may establish additional foundry relationships in the future as required to support new product development, customer requirements, or supply chain diversification.

For certain products used in aerospace, defense, and government-related applications, we may be required to source wafer fabrication, packaging, and testing services from suppliers that meet specific security, traceability, and quality standards.

In these cases, we work with manufacturing partners that support trusted microelectronics programs and maintain appropriate certifications and operational controls required by U.S.

government customers.

Employees and Human Capital

As of December 29, 2024, we had fifty-nine employees worldwide, of which fifty-one employees were located in the United States.

As of December 28, 2025, we had fifty-one employees worldwide, of which forty-three employees were located in the United States.

We believe o ur future success depends in part on our continued ability to attract, hire, and retain qualified personnel.

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December 28, 2025, our research and development staff consisted of

twenty-eight employees located in California, Oregon, Texas, Utah, New Jersey, Missouri, Canada, and Taiwan.

twenty-four employees located in

California, Idaho, Indiana, Massachusetts, Missouri, New Jersey, Oregon, Texas, Utah, Washington, Canada, and Taiwan.

These employees constitute the following groups:

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The office of the CTO investigates future trends and requirements in order to define the next generation of solutions and platforms.

Our SensiML group develops and maintains all software with respect to the SensiML Analytics Software Suite.

We monitor employee turnover rates by region and globally.

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Our turnover rate was 21% for the fiscal year ended December 28, 2025.

We believe our compensation philosophy, along with the career growth and development opportunities promotes longer employee tenure and reduces voluntary turnover.

Excluding the disposition of SensiML, our turnover rate was 16% for the fiscal year ended December 28, 2025.

We believe our compensation philosophy, along with the career growth and development opportunities promote longer employee tenure and reduce voluntary turnover.

Intellectual Property

We believe that it is important to maintain a large patent portfolio to protect our innovations.

We currently hold twenty-one active U.S.

patents and have four pending applications for additional U.S.

We currently hold twenty-two active U.S.

patents and have five pending applications for additional U.S.

Our patents contain claims covering various aspects of programmable integrated circuits, programmable interconnect structures, and programmable metal hardware products.

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Chairman of the Board

Christine Russell

Faith joined QuickLogic in June 1996.

Faith has served as our President and Chief Executive Officer since June 2016 after having served as Vice President of Worldwide Marketing and Vice President of Worldwide Sales & Marketing between 2008 and 2016.

Faith during the last 26 years has held a variety of managerial and executive leadership positions in engineering, product line management, marketing, and sales.

Faith has also served as the board member of the Global Semiconductor Alliance (GSA), the Chairman of the Marketing Committee for the CE-ATA Organization.

He holds a B.S.

degree in Computer Engineering from Santa Clara University and was an Adjunct Lecturer at Santa Clara University for Programmable Logic courses.

Elias Nader joined QuickLogic in February 2022.

Nader brings more than 30 years of experience in semiconductors and related industries, including 21 years in senior leadership positions.

Prior to joining QuickLogic, Mr.

Nader most recently served as Senior Vice President and Chief Financial officer at Pixelworks, Inc., where he was directly responsible for all of General and Administrative worldwide and worked directly with the Board of Directors to provide strategic and operational direction to the company.

Prior to that, Mr.

Nader worked at Sigma Designs, Inc.

as the Senior Vice President, Chief Financial Officer and Corporate Secretary.

Nader has also served in executive capacities at Imperial Jet and Dionex Corp.

Nader holds a Bachelor of Science Degree in Accounting and Bachelor of Arts Degree in Economics and an MBA in International Business from San Jose State University.

Faith joined QuickLogic in June 1996 and has served as President and Chief Executive Officer since June 2016.

Prior to his appointment as Chief Executive Officer, Mr.

Faith served as Vice President of Worldwide Marketing and Vice President of Worldwide Sales & Marketing from 2008 and 2016.

During his tenure at QuickLogic, Mr.

Faith has held a variety of managerial and executive leadership positions spanning engineering, product line management, marketing, and sales.

Faith has served on the board of the Global Semiconductor Alliance (GSA) and previously served as Chairman of the Marketing Committee for the CE-ATA Organization.

He holds a Bachelor of Science degree in Computer Engineering from Santa Clara University and has served as an Adjunct Lecturer at Santa Clara University, teaching courses related to programmable logic.

Elias Nader joined QuickLogic in February 2022, bringing more than three decades of leadership experience across the semiconductor and technology industries, including over 20 years in senior executive roles.

Before joining QuickLogic, Mr.

Nader served as Senior Vice President and Chief Financial Officer at Pixelworks, Inc.

(2019-2022), where he led all global General and Administrative functions and partnered closely with the Board of Directors to drive strategic and operational initiatives.

Prior to Pixelworks, Inc., Mr.

Nader held several key leadership positions at Sigma Designs, Inc., including Senior Vice President, Chief Financial Officer and Corporate Secretary (2013-2017), followed by his appointment as interim Chief Executive Officer (2017-2019).

Earlier in his career, he held executive roles at Dionex Corporation and interWave Communications, further broadening his operational and financial expertise.

Nader serves on the Boards of Directors of Immersion Corporation (IMMR) and Barnes & Noble Education Group (BNED), where he provides strategic, financial, and operational oversight.

He holds a Bachelor of Science degree in Accounting with a Minor in Economics, as well as an MBA in International Business, all from San Jose State University.

Rajiv Jain joined QuickLogic in August 1992.

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Previously, Dr.

Saxe has held a variety of executive leadership positions in QuickLogic including Vice President of Engineering and Vice President of Software Engineering.

Saxe was Vice President of FLASH Engineering at Actel Corp.

a semiconductor manufacturing company, from November 2000 to February 2001.

Saxe held a variety of executive leadership positions in QuickLogic including Vice President of Engineering and Vice President of Software Engineering.

Saxe was Vice President of FLASH Engineering at Actel Corp., a semiconductor manufacturing company, from November 2000 to February 2001.

Saxe joined GateField Corp., a design verification tools and services company formerly known as Zycad, in June 1983 and was a founder of their semiconductor manufacturing division in 1993.

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Bateman held sales and field application engineering positions at Intel and Abacus Polar.

Bateman has designed FPGAs and completed several successful FPGAs and custom ASIC designs.

Bateman spent several years in an ASIC design team and completed several successful FPGA and custom ASIC designs.

Bateman holds a Higher National Certificate in Electronic and Microelectronic Engineering from Brooklands College, England.

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Prior to joining QuickLogic, Mr.

Jaros most recently served as FlexLogix's World-Wide Vice President of Sales, Marketing, and Solutions Architecture.

Jaros most recently served as FlexLogix's World-Wide Vice President of Sales, Marketing, and Solutions Architecture from 2016 to 2024.

Prior to joining FlexLogix, Mr.

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Compared sentence by sentence after normalising whitespace, quotation marks, case and digits, so re-formatting and restated figures do not read as changed language. Wording changes appear as one removal and one addition. The current filing and the prior one are authoritative.

What changed 10-K

Item 1. Business