Onto Innovation is a worldwide leader in the design, development, manufacture and support of metrology and inspection tools for the semiconductor industry, including process control tools that perform optical metrology on patterned and unpatterned wafers, wafer macro-defect inspection, including macro-inspection of both 2D and 3D wafer features, wafer substrate and panel substrate lithography systems, and process control analytical software.
−Removed: Our products are primarily used by silicon wafer manufacturers, semiconductor device fabricators, and advanced packaging manufacturers operating in the semiconductor market.
−Removed: Our products are also used for process control in a number of other specialty device manufacturing markets, including light emitting diodes (“LED”), vertical-cavity surface-emitting lasers (“VCSEL”), micro-electromechanical systems (“MEMS”), CMOS image sensors (“CIS”), silicon and compound semiconductor (SiC and GaN) power devices, analog devices, RF filters, data storage, and certain industrial and scientific applications.
−Removed: We provide process and yield management solutions used in bare silicon wafer production and wafer processing facilities, often referred to as “front-end”
−Removed: manufacturing, and advanced packaging of chips and test facilities, or “back-end”
−Removed: manufacturing, through a portfolio of standalone systems for optical metrology, macro-defect inspection, packaging lithography, as well as transparent and opaque thin film measurements.
−Removed: Our automated and integrated metrology systems measure critical dimensions, device structures, topography, shape, and various thin film compositions, including three-dimensional features and film thickness, as well as optical, electrical and material properties.
+Added: Our products are primarily used by silicon wafer manufacturers, semiconductor integrated circuit (“IC”) fabricators, and advanced packaging manufacturers operating in the semiconductor market.
+Added: Our products are also used for process control in a number of other specialty device manufacturing markets, including light emitting diodes (“LED”), vertical-cavity surface-emitting lasers (“VCSEL”), micro-electromechanical systems (“MEMS”), CMOS image sensors (“CIS”), silicon and compound semiconductor (SiC and GaN) power devices, analog devices, RF filters, data storage, and certain industrial and scientific applications.
+Added: We provide process and yield management solutions used in bare silicon wafer production and wafer processing facilities, often referred to as “front-end” manufacturing, and advanced packaging of chips and test facilities, or “back-end” manufacturing, through a portfolio of standalone systems for optical metrology, macro-defect inspection, packaging lithography, as well as transparent and opaque thin film measurements.
+Added: Our automated and integrated metrology systems measure critical dimensions, device structures, topography, shape, and various thin film compositions, including three-dimensional features and film thickness, as well as optical and material properties.
Our primary areas of focus include products that provide critical yield-enhancing and actionable information, which is used by microelectronic device manufacturers to improve yield and time to market of their next-generation devices.
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Our systems are backed by worldwide customer service and applications support.
−Removed: On October 25, 2019, we became Onto Innovation Inc.
−Removed: upon the effectiveness of the merger (the “2019 Merger”) between Nanometrics Incorporated (“Nanometrics”) and Rudolph Technologies, Inc.
−Removed: (“Rudolph”).
−Removed: We accounted for the 2019 Merger as a reverse acquisition using the acquisition method of accounting in accordance with generally accepted accounting principles (“GAAP”).
−Removed: GAAP requires that either Nanometrics or Rudolph is designated as the acquirer for accounting and financial reporting purposes (“Accounting Acquirer”).
−Removed: Based on the evidence available, Rudolph was designated as the Accounting Acquirer while Nanometrics was the acquirer for legal purposes.
−Removed: Therefore, Rudolph’s historical results of operations replaced Nanometrics’
−Removed: historical results of operations for all periods prior to the 2019 Merger.
−Removed: However, ONTO stock price and volumes prior to October 25, 2019 are Nanometrics (NANO) stock data.
Industry Background
−Removed: We participate in the sale, design, manufacture, marketing and support of process control systems for optical critical dimension (“OCD”) metrology, thin film metrology, silicon wafer inspection, 2D and 3D macro inspection and lithography tools for advanced packaging and advanced analytical software for semiconductor manufacturing as well as inspection systems for certain industrial applications and scientific research.
+Added: We participate in the sale, design, manufacture, marketing and support of process control systems for optical critical dimension (“OCD”) metrology, thin film metrology, silicon wafer inspection, 2D and 3D macro inspection and lithography tools for advanced packaging and advanced analytical software for semiconductor manufacturing as well as inspection systems for certain industrial applications and scientific research.
Our principal market is semiconductor capital equipment.
−Removed: Semiconductors packaged as integrated circuits, or “chips”, are used in consumer electronics, server and enterprise systems, mobile computing (including smart phones and tablets), data storage devices, and embedded automotive and control systems.
+Added: Semiconductors packaged as ICs, or “chips”, are used in consumer electronics, server and enterprise systems, mobile computing (including smart phones and tablets), data storage devices, and embedded automotive and control systems.
Our core focus is the measurement and control of the structure, composition, and geometry of semiconductor devices as they are fabricated on silicon wafers to improve device performance and manufacturing yields.
−Removed: Our end customers manufacture many types of integrated circuits for a multitude of applications, each having unique manufacturing challenges.
−Removed: This includes integrated circuits to enable information processing and management (logic integrated circuits), memory storage (NAND, 3D-NAND, and DRAM), analog devices (e.g., Wi-Fi and 5G radio integrated circuits, power devices), MEMS sensor devices (accelerometers, pressure sensors, microphones), CMOS image sensors, and other specialty end markets including components for hard disk drives, LEDs, and power management devices.
+Added: Our end customers manufacture many types of ICs for a multitude of applications, each having unique manufacturing challenges.
+Added: This includes ICs to enable information processing and management (logic ICs), memory storage (NAND, 3D-NAND, and DRAM), analog devices (e.g., Wi-Fi and 5G radio ICs, power devices), MEMS sensor devices (accelerometers, pressure sensors, microphones), CMOS image sensors, and other specialty end markets including components for hard disk drives, LEDs, and power management devices.
Current Trends
−Removed: Business Environment
−Removed: Our metrology systems and software are primarily used for controlling certain manufacturing processes utilized in the production of advanced, or leading-edge, wafer designs.
−Removed: The shrinking of features such as the constituents that form a single transistor are known as node reductions.
−Removed: The numeric identification of a specific node usually refers to a dimension associated with one of the transistor’s constituents.
−Removed: Advanced nodes are associated with transistor dimensions less than 16nm.
+Added: Advanced Nodes.
+Added: “Advanced Nodes” refers to leading-edge ICs where the sizes of transistors and other features continue to shrink.
+Added: Advanced nodes are associated with transistor dimensions less than 16 nanometers (nm).
Our metrology systems used to measure and characterize these small features are generally purchased when a customer is beginning to manufacture at a new, smaller node, in order to set up and test new manufacturing equipment being installed for the new node.
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Therefore, our sales to customers for advanced nodes is generally higher when manufacturing lines for new nodes are being established and may not represent continuous sales revenue until our initial systems reach high levels of utilization driven by the need for greater capacity.
−Removed: In 2022 several top semiconductor manufacturers entered pilot production at a 3nm node using our Atlas ® V products.
−Removed: Our inspection systems, lithography systems, and software are primarily used for processing and inspecting advanced packaging associated with back-end manufacturing.
−Removed: Advanced packaging techniques comprise a very wide variety of assembly methods in order to connect individual chips to a larger printed circuit (“PC”) board, or connecting a group of chips together to form a “system in a package”
−Removed: (“SIP”), also known as heterogeneous integration (“HI”), or chiplets.
−Removed: Many of these advanced packages require lithographic imaging to produce copper interconnections between the chip and the PC Board or between chips in the case of SIP or HI advanced packages.
−Removed: Our inspection systems and software are used for process control and detection of potential reliability failures in nearly all of these packages.
−Removed: Unlike the cyclical nature of our metrology equipment associated with node shrinks, our sales revenue for advanced packaging is generally driven by assembly volumes.
−Removed: Inspection rates for advanced packages are high throughout the assembly process to avoid a single defective chip from being assembled into a relatively expensive package, making the inspection process control systems attach rates quite linear with production volumes of these devices.
−Removed: Several macro-drivers continue to drive demand for sophisticated metrology and inspection systems.
−Removed: In 2020, a significant portion of the global workforce began working from home as part of corporate efforts to isolate and protect workers from COVID-19.
−Removed: This transition resulted in extremely high usage of data centers and cloud processing that drove higher demand for increased memory and HPC devices.
−Removed: In 2021, wireless 5G networks drove demand for new 5G phones and that demand continued in the first half of 2022 as new phones from Apple and Samsung were introduced to the market.
−Removed: The building of the 5G network over the next several years will also bring more machine-to-machine communications.
−Removed: In addition, the rise of electric vehicles and other industrial technologies is creating an increase in demand for power semiconductors.
−Removed: And semiconductor manufacturers are increasingly developing chiplets that include a series of smaller die rather than one larger monolithic die.
−Removed: These macro-drivers are increasing the need for high-performance semiconductors and advanced packaging, which are then driving the demand for sophisticated metrology and inspection systems in order to achieve the semiconductor performance required while achieving a profitable manufacturing yield.
−Removed: Since the first fiscal quarter of 2020, Onto Innovation has launched twelve new products that include six new metrology systems, two new macro defect inspection system, a panel lithography tool and two new software products.
−Removed: These new products were introduced as logic integrated device manufacturers (“IDMs”) and foundries were increasing their capacity while following aggressive plans to transition their manufacturing to smaller nodes.
−Removed: Other customer interactions at memory and specialty device manufacturers as well as providers of advanced packaging centered around satisfying the immediate demand for these devices with our existing product portfolio, while partnering with R&D groups to prepare for the process controls needed for the next generation of semiconductors and packaging that will require the latest systems from Onto Innovation.
−Removed: We believe our strong engineering teams have delivered, and will continue to deliver, new products to our customers, followed by our field engineers providing customer support, while simultaneously achieving our gross and operating margin targets that were established in our long-term operating models.
−Removed: Revenue reached $1 billion in fiscal 2022 as customers transitioned to advanced nodes and increased advanced packaging volumes, and the Company was able to achieve operating margins and earnings at the high end of our quarterly guidance and analysts’
−Removed: Advanced Nodes.
−Removed: “Advanced Nodes”
−Removed: refers to leading-edge integrated circuits where the feature sizes of transistors and other features continue to shrink in specified steps, or nodes measured in nanometers (nm).
−Removed: Demand for our products continues to be driven by our customers' desire for higher overall chip performance without increasing the chip size, while improving power efficiency, logic processing capability, data storage volume and manufacturing yield.
−Removed: To achieve these goals, our customers have increased their use of more complex materials and processing methods in their manufacturing flow.
−Removed: The primary paths for performance gains are geometric scaling, known as node shrinks, or scaling of transistor dimensions.
−Removed: In some cases, our customers are implementing new materials and methods in high volume manufacturing, including materials and device architectures to reduce power consumption, and stacked devices.
−Removed: To scale NAND memory, a 3D stacking architecture has been implemented at several customers with more than 150 storage cell layers for devices in production.
+Added: Demand for our products continues to be driven by our customers’ desire for higher overall chip performance enabled by a greater number of transistors per square millimeter, while improving power efficiency, logic processing capability, data storage volume and manufacturing yield.
+Added: To achieve these goals, our customers have increased their use of more complex
+Added: materials and processing methods in their manufacturing flow.
+Added: The primary path for performance gains is geometric scaling, known as node shrinks, or scaling of transistor dimensions.
+Added: In some cases, our customers are implementing new materials and methods in high volume manufacturing, including materials and device architectures to reduce power consumption.
+Added: To scale NAND memory, for example, a 3D layered architecture has been implemented for several customers with more than 150 storage cell layers for devices in production.
Additional innovation continues in Data Storage, Power Devices, MEMS, and Image Sensors.
−Removed: We believe the use of these new materials and manufacturing methods has increased demand for our products such as the Atlas ® product line that is capable of measuring these advanced nodes as certain features shrink beyond 7nm, to 5nm, 3nm and in the most advanced of cases, 2 nm.
−Removed: To shrink features, new methods, including multiple patterning lithography and extreme ultra-violet (“EUV”) lithography, have been developed.
+Added: We believe the use of these new materials and manufacturing methods has increased demand for our products such as the Atlas ® product line, which is capable of measuring advanced nodes as certain features shrink beyond 7nm, to 5nm, 3nm and in the most advanced of cases, 2 nm or less.
+Added: To shrink features, new methods, including multiple patterning lithography and extreme ultra-violet (“EUV”) lithography, have been developed.
The EUV process is driving significantly higher requirements for the silicon wafers that are entering the EUV chamber.
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The top side of wafers used for the EUV process is covered with an epitaxial layer, which must also be scanned for any impurities.
−Removed: This compositional analysis is measured using our Element ® system using Fourier Transform Infrared (“FTIR”) algorithms.
+Added: This compositional analysis may be measured using our Element ® system using Fourier Transform Infrared (“FTIR”) algorithms.
Advanced Packaging.
−Removed: “Advanced Packaging”
−Removed: refers to a variety of technologies that enable the miniaturization of electronic products, such as portable consumer devices, including smartphones, watches, and tablets.
−Removed: Historically, integrated circuit packaging refers to the final stage of semiconductor device fabrication, in which a single circuit made from semiconducting material (a die or chip) is encased in a molded package using small wires to provide connections to a carrier that can be soldered to a printed circuit board and also prevents physical damage and corrosion to the chip. 
−Removed: Advanced Packaging refers loosely to the multi-layer conductors and chip structures (other than wires) that often interconnect multiple die, feed them with electric power and create signal paths to and from the PC board, dissipate their heat, and protect them from damage. 
+Added: “Advanced Packaging” refers to a variety of technologies that enable the miniaturization of electronic products, such as smartphones, watches, and tablets.
+Added: Historically, IC packaging refers to the final stage of semiconductor device fabrication, in which a single circuit made from semiconducting material (a die or chip) is encased in a molded package using small wires to provide connections to a carrier that can be soldered to a printed circuit board and also prevents physical damage and corrosion to the chip.
+Added: Advanced Packaging refers loosely to the multi-layer conductors and chip structures (other than wires) that often interconnect multiple die, feed them with electric power and create signal paths to and from the Printed Circuit (“PC”) board, dissipate their heat, and protect them from damage.
Today, the drive to pack more functions into a small space and reduce their power requirements demands that chip packages do much more than ever before to combine multiple chips and functions into a single molded package.
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This technology involves stacking individual chips in one integrated package.
−Removed: Through-silicon vias (“TSVs”) are vertical copper interconnects that are embedded from the bottom surface of a die to the top surface and uses small copper/solder “bumps”
−Removed: to connect one chip to another, which allows power and communication to be shared among the individually stacked components.
+Added: Through-silicon vias (“TSVs”) are vertical copper interconnects that are embedded from the bottom surface of a die to the top surface and use small copper/solder “bumps” to connect one chip to another.
+Added: TSVs allow power and communication to be shared among the individually stacked components.
This offers the advantages of shorter signal paths and, in turn, reduced power consumption, enhanced bandwidths, integration of heterogeneous components such as memory and logic chips, and smaller surface area.
The processes required for 3D integration vary from one manufacturer to another and many continue to be optimized for yield and to ensure the functioning of individual stacked chips.
−Removed: Heterogeneous packages are another advanced packaging technology using copper pillars/bumps to vertically connect a wide variety of stacked die for 2.5D, and 3D integration techniques as well as horizontally connected chips and are considered the next disruptive technology for several reasons.
−Removed: First, heterogeneous integrated packages using 3D stacking can significantly reduce the space needed inside an electronic device, such as a smartphone, by combining multiple chips/functions into a SIP.
−Removed: Next, it improves the system’s performance by reducing power and signal conductor lengths, which previously were routed from package to package through a PC board.
−Removed: Using thin redistribution layers (“RDLs”) to connect chips that are side-by-side or “fan out”
−Removed: power and signal connections to the larger contacts on the PC board, which accounts for 35 percent of the packaging cost.
+Added: Heterogeneous integrated (“HI”) packaging is another advanced packaging technology using copper pillars/bumps to vertically connect a wide variety of stacked die for 2.5D, and 3D integration techniques as well as horizontally connected chips and is considered the next disruptive technology for several reasons.
+Added: First, HI packages using 3D stacking can significantly reduce the space needed inside an electronic device, such as a smartphone, by combining multiple chips/functions into a “system in a package” (“SIP”).
+Added: Next, HI packages also improve a system’s performance by reducing power and signal conductor lengths, which previously were routed from package to package through a PC board using thin redistribution layers (“RDLs”) to connect chips that are side-by-side.
Lastly, the technology is currently considered the preferred vehicle for next generation uses, such as SIP, and package on package formats.
−Removed: As a result of the small overall form factor, heterogeneous integrated packages provide the functionality needed in high-end mobile and wearable products.
−Removed: The current and projected adoption of 5G-enabled smartphones continues to grow.
−Removed: Even as overall sales of smartphones waned in 2022, the demand for 5G chipsets, which are used in both handsets and infrastructure, did not.
−Removed: This trend is driving semiconductor manufacturers to increase capacity to support the advanced packaging technologies that are used in production of 5G integrated circuits, which continues to create opportunities for our solutions.
+Added: As a result of the small overall form factor, HI packages provide the functionality needed in high-end mobile and wearable products.
+Added: Our inspection systems and software are used for process control and detection of potential reliability failures in nearly all of these packages.
+Added: Inspection rates for advanced packages are high throughout the assembly process to avoid a single defective chip from being assembled into a relatively expensive package.
+Added: Thus, unlike the cyclical nature of our metrology equipment associated with node shrinks, our sales revenue for advanced packaging is generally driven by assembly volumes.
Panel Substrate Manufacturing .
−Removed: One current process to manufacture advanced packaging involves attaching known good die to a 300mm wafer, used as a temporary carrier when adding components such as RDLs and copper pillars.
−Removed: SIP packages can often contain side-by-side die, meaning the package can be large and limit the number of packages being placed on a reconstituted wafer.
+Added: One current process to manufacture advanced packaging involves attaching known good die to a 300mm wafer.
+Added: SIP packages can often contain side-by-side die, meaning the package can be large and limit the number of packages being placed on a wafer.
In order to meet the growing demand at reduced average selling prices, manufacturers are looking to scalable technology.
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This larger size enables companies manufacturing large area packages to increase the number of devices being processed at each step as they are no longer limited to operating within the constraints of a round wafer.
−Removed: By responding to market opportunities and addressing the stringent demands of customers’
−Removed: technical roadmaps, we believe that Onto Innovation is optimally positioned to capitalize on the emerging market of high-volume manufacturing of advanced IC substrates.
−Removed: For example, the JetStep ® X500 lithography system, having emerged from the flat panel display market, is readily capable of processing RDLs on very thin advanced organic laminate panels in the semiconductor advanced packaging market.
+Added: By responding to market opportunities and addressing the stringent demands of customers’ technical roadmaps, we believe that Onto Innovation is optimally positioned to capitalize on the emerging market of high-volume manufacturing of advanced IC substrates.
+Added: example, the JetStep ® X500 lithography system, having emerged from the flat panel display market, is readily capable of processing RDLs on very thin advanced organic laminate panels in the semiconductor advanced packaging market.
The Firefly ® series of panel level macro inspection tools, designed for high resolution inspection, can provide defect detection and location information to the JetStep X500 tool for each die, which greatly improves lithography throughput using our exclusive StepFAST process.
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It reduces capital investment requirements and provides a reliable pathway to transition from wafer to panel-based processes.
−Removed: We believe that our expertise in our core technologies of optics and software and our combined investment in research and development will enable us to rapidly develop new technologies and products as we have demonstrated over the past three years of operation in order to quickly respond to emerging industry trends and competitive challenges.
+Added: We believe that our expertise in our core technologies of optics and software and our combined investment in research and development will enable us to rapidly develop new technologies and products in order to quickly respond to emerging industry trends and competitive challenges.
The breadth of our technology enables us to offer a diverse combination of metrology, inspection, and process control solutions.
−Removed: Unique features have been designed into our lithography systems to meet our customers’
−Removed: changing process requirements.
+Added: Unique features have been designed into our lithography systems to meet our customers’ changing process requirements.
Our metrology and inspection technologies provide process control for the majority of advanced node wafers processed today in a semiconductor wafer fab.
−Removed: In front-end processes, OCD metrology, thin film metrology, wafer stress metrology and macro defect detection and classification technologies allow yield enhancement for critical processes such as photolithography, diffusion, etch, chemical mechanical planarization (“CMP”) and outgoing quality control.
+Added: In front-end processes, OCD metrology, thin film metrology, wafer stress metrology and macro defect detection and classification technologies allow yield enhancement for critical processes such as photolithography, diffusion, etch, chemical mechanical planarization (“CMP”) and outgoing quality control.
Within the back-end manufacturing processes, our 2D/3D advanced macro defect inspection provides our customers with critical quality assurance and process information.
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Lastly, we turn the gathered data into useful knowledge for our customers to make yield-enhancing decisions, which lower their scrap cost and environmental impact and improve their margins.
−Removed: Onto Innovation’s Products
+Added: Onto Innovation’s Products
Automated Metrology Systems .
−Removed: Our automated systems primarily consist of fully automated metrology systems that are employed in semiconductor production environments.
−Removed: The Atlas family of products represents our line of high-performance metrology systems providing OCD and thin film metrology and wafer stress metrology for transistor and interconnect metrology applications.
−Removed: The thin film and OCD technology is supported by our NanoCD suite of solutions including our latest introductions of AI Diffract software, SpectraProbe software and NanoGen scalable computing engine, which enables visualization, modeling, and analysis of complex structures.
+Added: The Atlas family of products represents our line of high-performance automated metrology systems providing OCD and thin film metrology and wafer stress metrology for transistor and interconnect metrology applications.
+Added: The thin film and OCD technology is supported by our suite of solutions including our latest introductions of AI Diffract software, SpectraProbe software and NanoGen scalable computing engine, which enables visualization, modeling, and analysis of complex structures.
AI Diffract is a modeling, visualization and analysis software that takes signals from the metrology systems, providing critical dimension, thickness, and optical properties from in-line measurements.
−Removed: The software has an intuitive three-dimensional modeling interface to provide visualization of today’s advanced and complex semiconductor devices.
+Added: The software has an intuitive three-dimensional modeling interface to provide visualization of today’s advanced and complex semiconductor devices.
There are proprietary fitting algorithms in AI Diffract that enable very accurate and very fast calculations for signal processing for high fidelity model-based measurements.
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Integrated Metrology Systems .
−Removed: Our integrated metrology (“IM”) systems are installed directly onto wafer processing equipment to provide near real-time measurements for improved process control and maximum throughput.
+Added: Our integrated metrology (“IM”) systems are installed directly onto wafer processing equipment to provide near real-time measurements for improved process control and maximum throughput.
Our IM systems are sold directly to end user customers.
−Removed: The IMPULSE ® family of products includes the latest technology for OCD, and thin film metrology, and have been successfully qualified on numerous independent wafer fabrication equipment suppliers’
+Added: The IMPULSE ® family of products includes the latest technology for OCD, and thin film metrology, and has been successfully qualified on multiple independent wafer fabrication equipment suppliers’ platforms.
Silicon Wafer All-surface Inspection/Characterization .
−Removed: “All-surface”
−Removed: refers to inspection of the wafer frontside, edge, and backside as well as wafer’s locator notch.
+Added: “All-surface” refers to inspection of the wafer frontside, edge, and backside as well as wafer’s locator notch.
The edge inspection process focuses on the area near the wafer edge, an area that poses difficulty for traditional wafer frontside inspection technology due to its varied topography and process variation.
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For instance, it is critical that the wafer backside be free of defects prior to the EUV lithography process to prevent focus and exposure problems on the wafer frontside.
−Removed: Our materials characterization products include systems that are used to monitor the physical, optical, electrical and material characteristics of discrete electronic industry, opto-electronic, HB-LED (high brightness LEDs), solar PV (solar photovoltaics), compound semiconductor, strained silicon and silicon-on-insulator (“SOI”) devices, including composition, crystal structure, layer thickness, dopant concentration, contamination and electron mobility.
−Removed: We have a broad portfolio of products for materials characterization including photoluminescence mapping and Fourier Transform Infrared (“FTIR”) spectroscope in automated and manual systems for substrate quality and epitaxial thickness metrology.
+Added: Our materials characterization products include systems that are used to monitor the physical, optical, and material characteristics of discrete electronic industry, opto-electronic, HB-LED (high brightness LEDs), solar PV (solar photovoltaics), compound semiconductor, strained silicon and silicon-on-insulator (“SOI”) devices, including composition, crystal structure, layer thickness, dopant concentration, contamination and electron mobility.
+Added: We have a broad portfolio of products for materials characterization including photoluminescence mapping and Fourier Transform Infrared (“FTIR”) spectroscope in automated and manual systems for substrate quality and epitaxial thickness metrology.
The NanoSpec ® line supports thin film measurement across all applications in both low volume production and research applications.
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Chip manufacturers deploy advanced macro defect inspection throughout the production line to monitor key process steps, gather process-enhancing information and ultimately, lower manufacturing costs.
−Removed: Field-established tools such as the F30, NSX ® , and the latest Dragonfly ® G3 inspection systems are found in the wafer fab (front-end) and packaging (back-end) facilities around the world.
+Added: Field-established tools such as the F30, NSX ® , Firefly ® , and the latest Dragonfly ® G3 inspection systems are found in the wafer fab (front-end) and packaging (back-end) facilities around the world.
These high-speed tools incorporate features such as wafer-less recipe creation, tool-to-tool correlation and multiple inspection resolutions.
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To do this, our systems capture full-color whole wafer images using simultaneous dark and bright field illumination.
−Removed: The resulting bright and dark field images are compared to those from an “ideal”
−Removed: wafer having no defects.
−Removed: When a difference is detected, its image is broken down into mathematical vectors that allow rapid and accurate comparison with a library of known classified defects stored in the tool’s database.
+Added: The resulting bright and dark field images are compared to those from an “ideal” wafer having no defects using our Automated Defect Classification (“ADC”) software.
+Added: When a difference is detected, its image is broken down into mathematical vectors that allow rapid and accurate comparison with a library of known classified defects stored in the tool’s database.
Patented and proprietary enhancements of this approach enable very fast and highly repeatable image classification.
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This allows customers to define defects based on their existing defect classification system, provides more reliable automated rework decisions and enables more accurate statistical process control data.
−Removed: Reviewing defects off-line enables automated inspection systems to maintain their utilization for high throughput inspection.
+Added: Reviewing defects using ADC enables automated inspection systems to maintain their utilization for high throughput inspection.
Using defect image files captured by automated inspection systems, operators are able to view high-resolution defect images to determine defects that cause catastrophic failure of a device, known as killer defects.
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Opaque Film Metrology .
−Removed: The MetaPULSE ® systems allow customers to simultaneously measure the thickness and other properties of up to six metal or non-metallic opaque film layers without physically contacting product wafers.
−Removed: PULSE ® technology uses an ultra-fast laser to generate acoustic waves that pass down through a stack of opaque films such as those used in copper or aluminum interconnect processes, as well as the hard mask layer in 3D NAND chips, sending back to the surface a reflected signal (echo) that indicates film thickness, density, and other process critical parameters.
+Added: The MetaPULSE ® and Echo TM systems allow customers to simultaneously measure the thickness and other properties of up to six metal or non-metallic opaque film layers without physically contacting product wafers.
+Added: PULSE TM technology uses an ultra-fast laser to generate acoustic waves that pass down through a stack of opaque films such as those used in copper or aluminum interconnect processes, as well as the hard mask layer in 3D NAND chips, sending back to the surface a reflected signal (echo) that indicates film thickness, density, and other process critical parameters.
We believe we are a leader in providing systems that can measure opaque thin-film stacks non-destructively with the speed and accuracy semiconductor device manufacturers demand in order to achieve high yields with the latest fabrication processes.
The technology is ideal for characterizing copper interconnect structures.
−Removed: The MetaPULSE systems, used initially for fast and accurate measurements of metal interconnect in front-end wafer fabs, have now been chosen by back-end manufacturers to perform system measurements in new process applications such as RF filters and modules, driven by the need for on-product metrology as feature sizes decrease and pattern densities increase.
−Removed: Industrial, Scientific, and Research Markets ―
−Removed: 4D Technology .
+Added: The MetaPULSE and Echo systems, used for fast and accurate measurements of metal interconnect in front-end wafer fabs, have now been chosen by back-end manufacturers to perform system measurements in new process applications such as RF filters and modules, driven by the need for on-product metrology as feature sizes decrease and pattern densities increase.
+Added: Industrial, Scientific, and Research Markets ― 4D Technology ® .
The 4D business offers a line of interferometry systems for the measurement and inspection of high precision surfaces.
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Substrates are aligned on the system and the mask is imaged through a projection lens onto photoresist material coated on the substrate.
−Removed: The substrate is then moved, or “stepped,”
−Removed: to a second position to expose an adjacent area.
+Added: The substrate is then moved, or “stepped,” to a second position to expose an adjacent area.
The system repeats the step and exposure process until the entire substrate is patterned.
Once the exposure process has been completed, the substrate is developed with an alkali solution to reveal the underlying material.
−Removed: The imaged photoresist serves as a stencil barrier that allows for the processing of the underlying metal or insulating layers.
+Added: imaged photoresist serves as a stencil barrier that allows for the processing of the underlying metal or insulating layers.
The substrates then continue through the etching, stripping and deposition processes until multi-layer circuits are completed.
−Removed: In order to deal with increased input/output (“I/O”) resulting from devices with enhanced functionality, increased power distribution efficiency, and higher frequency, IDMs and outsourced semiconductor assembly and test (“OSATs”) facilities must incorporate lithography capabilities to create RDLs for their advanced packaging technologies. However, the associated substrates and processes are significantly different than those used in front-end wafer processing. For advanced packaging, the lithography system must perform in a completely different application, with significantly different operating parameters. For example, most packaging is an additive process, while wafer processing is subtractive, and thick films, rather than thin films, are used to enable the creation of features. In order for equipment to effectively function in this environment, it must overcome these challenges. Our JetStep ® systems have been specifically designed to meet these challenges head on.
−Removed: The new JetStep X500 System is designed for rectangular substrates (panels), which when combined with user-selectable wavelength options, maximizes throughput while not limiting resolution when needed. High-fidelity optics are able to image the fine features required while at the same time achieving superior depth of field to minimize non-flatness that is typical for advanced packaging applications. On-the-fly auto focus and an innovative reticle management system improve yield and utilization. These features result in a revolutionary lithography system specifically designed to meet advanced packaging challenges.
+Added: In order to deal with increased input/output (“I/O”) resulting from devices with enhanced functionality, increased power distribution efficiency, and higher frequency, IDMs and outsourced semiconductor assembly and test (“OSATs”) facilities must incorporate lithography capabilities to create RDLs for their advanced packaging technologies.
+Added: However, the associated substrates and processes are significantly different than those used in front-end wafer processing.
+Added: For advanced packaging, the lithography system must perform in a completely different application, with significantly different operating parameters.
+Added: For example, most packaging is an additive process, while wafer processing is subtractive, and thick films, rather than thin films, are used to enable the creation of features.
+Added: In order for equipment to effectively function in this environment, it must overcome these challenges.
+Added: Our JetStep ® systems have been specifically designed to meet these challenges head on.
+Added: The new JetStep X500 System is designed for rectangular substrates (panels), which when combined with user-selectable wavelength options, maximizes throughput while not limiting resolution when needed.
+Added: High-fidelity optics are able to image the fine features required while at the same time achieving superior depth of field to minimize non-flatness that is typical for advanced packaging applications.
+Added: On-the-fly auto focus and an innovative reticle management system improve yield and utilization.
+Added: These features result in a revolutionary lithography system specifically designed to meet advanced packaging challenges.
Process Control Software .
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We are a leading provider of process control software in the semiconductor industry.
−Removed: Advanced process control (“APC”) employs software to automatically detect or predict tool failure (fault detection) as well as calculate recipe settings for a process that will drive the yielded output to meet and exceed the target, despite variations in the incoming material and minor instabilities within the process equipment.
+Added: Advanced process control (“APC”) employs software to automatically detect or predict tool failure (fault detection) as well as calculate recipe settings for a process that will drive the yielded output to meet and exceed the target, despite variations in the incoming material and minor instabilities within the process equipment.
Process control software enables the factory to increase capacity and yield while decreasing rework and scrap.
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Yield Management Software .
−Removed: Semiconductor manufacturers use yield management software (“YMS”) to obtain valuable process yield and equipment productivity information.
+Added: Semiconductor manufacturers use yield management software (“YMS”) to obtain valuable process yield and equipment productivity information.
The data necessary to generate productivity information comes from many different sources throughout the wafer fab:
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Our fully integrated YMS is designed to analyze data from disparate sources and multiple sites to maximize productivity across the entire value chain.
−Removed: Over 190 microelectronic device manufacturers purchased Onto Innovation tools or software in 2022.
+Added: Over 220 customers purchased Onto Innovation tools or software in 2023.
We support a diverse customer base in terms of both geographic location and type of device manufactured.
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The following chart identifies our customers that represented 10% or more of total revenue for each of the last three fiscal years:
−Removed: Taiwan Semiconductor Manufacturing Co.
Samsung Semiconductor
+Added: Taiwan Semiconductor Manufacturing Co.
SK Hynix Inc.
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We have field service operations based in various locations throughout the United States, South Korea, Taiwan, China, Japan, Vietnam, Malaysia, Singapore, Israel, and Europe.
−Removed: We offer various products for various semiconductor manufacturing process steps, and several of our products extend across the same process flow.
−Removed: However, for process control of each of these process steps, we have multiple established and potential competitors, some of which may have greater financial, research, engineering, manufacturing and marketing resources than we have.
−Removed: We may also face future competition from new market entrants from other overseas and domestic sources.
−Removed: We expect our competitors to continue to improve the design and performance of their current products and processes, and to introduce new products and processes with improved price and performance characteristics.
−Removed: In order to remain competitive, we believe that we will require significant financial resources to offer a broad range of products, and to maintain customer service and support centers worldwide, and to invest in product research and development.
−Removed: In every market in which we participate, the global semiconductor equipment industry is intensely competitive, and driven by rapid technological adoption cycles.
−Removed: Our ability to compete effectively depends upon our ability to continuously improve our products, applications and services, and our ability to develop new products, applications and services that meet constantly evolving customer requirements.
−Removed: In automated systems for the semiconductor industry, our principal competitors are KLA Corporation (“KLA”) and Nova Ltd.
−Removed: (formerly Nova Measuring Instruments Ltd.) (“Nova”) for thin film and critical dimension OCD metrology.
+Added: The global semiconductor equipment industry is intensely competitive and we have multiple established and potential competitors in the markets in which we participate.
+Added: Our industry is driven by rapid technological adoption cycles, with new entrants from overseas and domestic sources competing for our customers’ business.
+Added: Our ability to compete effectively depends upon our ability to continuously improve our existing products, applications and services, and our ability to develop new products, applications and services that meet constantly evolving customer requirements.
+Added: In order to continuously improve and develop new products and maintain customer service and support centers worldwide, we believe that we will require significant resources;
+Added: however, some of our competitors may have greater financial, research, engineering, manufacturing and marketing resources than we have.
+Added: In automated systems for the semiconductor industry, our principal competitors are KLA Corporation (“KLA”) and Nova Ltd.
+Added: (formerly Nova Measuring Instruments Ltd.) (“Nova”) for thin film and critical dimension OCD metrology.
Our principal competitors for advanced packaging inspection are KLA and Camtek Ltd.
−Removed: (“Camtek”).
While the advanced packaging lithography market is served by various competitors, our primary competitors are Ushio, Inc.
−Removed: (“Ushio”) and Canon, Inc.
−Removed: (“Canon”).
+Added: (“Ushio”) and Canon, Inc.
Our primary competitor for inspection in the panel market is GigaVis Co.
The primary competitor for our software products is PDF Solutions, Inc.
−Removed: (“PDF Solutions”) and our primary competitor for integrated metrology systems for the semiconductor industry is Nova.
+Added: (“PDF Solutions”) and our primary competitor for integrated metrology systems for the semiconductor industry is Nova.
The opto-electronics, discrete device and industrial and scientific markets are addressed primarily by our material characterization and 4D systems, served by numerous competitors, of which no single competitor or group of competitors has established a majority position.
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Manufacturing
−Removed: Our manufacturing operations are in Milpitas California, Tucson Arizona, Wilmington Massachusetts, Bloomington Minnesota, and at various contract manufacturers around the world.
+Added: Our manufacturing operations are in Milpitas, California;
+Added: Tucson, Arizona;
+Added: Wilmington, Massachusetts;
+Added: Bloomington, Minnesota;
+Added: and at various contract manufacturers around the world.
It is our strategy to outsource the assemblies that do not contain elements that we believe lead to a direct competitive advantage.
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We also have long-term supply agreements with strategic suppliers for the supply of key assemblies for use in our products.
−Removed: We rely on limited source suppliers for certain parts and subassemblies.
−Removed: This reliance creates a potential inability to obtain an adequate supply of required components, and reduced control over pricing and time of delivery of components.
−Removed: An inability to obtain adequate supplies may require us to seek alternative sources of supply or redesign our systems to accommodate different components or subassemblies, which could result in additional expenses and delays in product development or shipment of product to our customers.
−Removed: Disruption or termination of the supply of components has delayed and could continue to delay shipments of some of our systems.
−Removed: Such delays may damage our customer relationships and reduce our sales.
+Added: For more information, please see “Part I, Item IA - Risk Factors - If we do not manage our supply chain effectively, our operating results may be adversely affected, and any increases in material, labor, supplier, logistics and other operating costs, or supply chain delays and shortages, could lower our margins or result in lost sales”.
Research and Development
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The markets for equipment and systems for manufacturing semiconductor devices and for performing OCD metrology, macro-defect inspection, advanced packaging lithography and thin film transparent and opaque process control metrology are characterized by continuous technological development and product innovations.
−Removed: We believe that the rapid and ongoing development of new products and enhancements to existing products is critical to our success.
+Added: We believe that the rapid and ongoing development of new products and enhancements to existing products are critical to our success.
Accordingly, we devote a significant portion of our technical, management and financial resources to research and development programs.
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Our patents and patent applications principally cover various aspects of metrology, macro-defect detection and classification, altered material characterization, lithography techniques, automation, artificial intelligence, and machine learning.
−Removed: Our pending patent applications may never be issued, and even if they are, these patents, our existing patents and the patents we license may not provide sufficiently broad protection to protect our intellectual property, or they may prove to be unenforceable.
−Removed: To protect our intellectual property, we also rely on a combination of patents, copyrights, trademarks, trade secret laws, contractual provisions and licenses and non-disclosure agreements.
−Removed: There can be no assurance (i) that any patents or trademarks issued to or licensed by us will not be challenged, invalidated or circumvented, (ii) that the rights granted thereunder will provide us with a competitive advantage or (iii) that we will be able to fully protect our intellectual property.
−Removed: Additionally, others may obtain patents or trademarks and assert them against us.
−Removed: From time to time, we receive communications from third parties asserting that our systems, software and/or methods may contain features that such third parties claim may infringe upon their intellectual property rights.
−Removed: From time to time, we may find it necessary to initiate litigation against other persons or entities to protect and/or enforce our intellectual property rights or contractual rights.
−Removed: However, litigation is costly and time consuming and there is no assurance that any lawsuit we bring will yield the result that we seek, as (i) the lawsuit may be dismissed or there could be an adverse finding, (ii) we may not be able to pursue the lawsuit due to the laws of the applicable country or (iii) there may be a subsequent unfavorable change in the laws that limit our ability to pursue the lawsuit.
−Removed: There is a risk that our means of protecting our intellectual property may not be adequate.
−Removed: For example, our competitors may independently develop similar technology or duplicate our products.
−Removed: If we fail to adequately protect our intellectual property, it would be easier for our competitors to sell competing products.
+Added: To protect our intellectual property, we rely on a combination of patents, copyrights, trademarks, trade secret laws, contractual provisions and licenses and non-disclosure agreements.
+Added: There can be no assurance that our intellectual property will provide us competitive advantage or that we will be able to fully protect our intellectual property.
+Added: For more information, please see “Part I, Item IA - We may fail to adequately protect our intellectual property and, therefore, lose our competitive advantage.” Additionally, others may obtain patents or trademarks and assert them against us.
+Added: We may find it necessary to engage in litigation regarding intellectual property rights or contractual rights, which will be costly and time consuming without guarantee that it will yield the result we seek.
+Added: For more information, please see “Part I, Item IA - Protection of our intellectual property rights, or the efforts of third parties to enforce their own intellectual property rights against us, may result in costly and time-consuming litigation, substantial damages, lost product sales and/or the loss of important intellectual property rights.”
Human Capital and Talent
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All of our employees are expected to uphold the following core values which are foundational to our culture:
−Removed: Passion –
−Removed: ownership, pride and caring in our work
−Removed: Integrity –
−Removed: honesty, dependable, predictable and accountable
−Removed: Collaboration –
−Removed: working together toward a common goal
−Removed: Results –
−Removed: meeting and exceeding goals, focused toward innovation and growth
+Added: • Passion – ownership, pride and caring in our work
+Added: • Integrity – honesty, dependable, predictable and accountable
+Added: • Collaboration – working together toward a common goal
+Added: • Results – meeting and exceeding goals, focused toward innovation and growth
These core values define the way we do business in our everyday actions and choices.
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In addition, we look to actively engage within our communities to foster and attain social equity.
−Removed: In order to ensure that we are meeting our human capital and talent objectives, we frequently utilize employee surveys to understand the effectiveness of our employee and Company programs and where we can improve across the Company.
−Removed: Our latest survey, completed during fiscal 2022, had a participation rate of over 84% of all our employees.
−Removed: Through the survey, our employees indicated that the Company’s greatest strengths include ensuring that managers are communicating performance expectations to employees by providing feedback on performance and supporting development, providing a caring work environment, and fostering an environment where employees have the opportunity to do their best and have a sense of accomplishment from their work.
Compensation Philosophy .
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We have rigorous health and safety programs focused on awareness, recognition, risk assessment and management, as well as teamwork.
−Removed: In response to the COVID-19 pandemic, we implemented a response plan that we believe was in the best interest and health of our employees and the communities in which we operate.
−Removed: We continue to follow local statutory safety requirements while also monitoring COVID case numbers, in the communities in which operate, to constantly update our safety protocols and requirements
Our benefit plans are competitive and comprehensive.
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Corporate Social Responsibility
−Removed: Our stakeholders are essential to our business –
−Removed: shareholders, customers, suppliers, employees, communities as well as the environment and society.
−Removed: We are working to make our workforce more inclusive, our business more sustainable, and our communities more engaged by maintaining strong environmental, social and governance (“ESG”) practices.
+Added: Our stakeholders are essential to our business – shareholders, customers, suppliers, employees, communities as well as the environment and society.
+Added: We are working to make our workforce more inclusive, our business more sustainable, and our communities more engaged by maintaining strong environmental, social and governance (“ESG”) practices.
Actions we have taken in pursuit of these commitments include the following environmental and social programs:
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• Demanded excellence in our quality performance, as demonstrated through our product and process qualification commitments, including ISO 9001 Quality Management;
−Removed: Set goals to reduce our environmental impact, including an increase in our use of renewable energy, a decrease in hazardous waste landfill, an increase in our use of recycled materials and beneficial reuse, and a reduction in our freshwater usage;
−Removed: Commitment to RBA Code of Conduct and humane treatment of all at Onto Innovation both upstream and downstream.
+Added: • Set goals to reduce our environmental impact, including an increase in our use of renewable energy, a decrease in hazardous waste landfill, an increase in recycling materials and beneficial reuse, and a reduction in our freshwater usage;
+Added: • Committed to RBA Code of Conduct and humane treatment of all at Onto Innovation both upstream and downstream.
We established policies and practices to ensure that:
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workers are treated with respect and dignity;
−Removed: Manufacturing processes are environmentally responsible.
+Added: and manufacturing processes are environmentally responsible.
• Produced systems responsibly by offering tool trade-in, refurbishment and technology upgrade programs;
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• Engaged in community service projects in our communities globally.
−Removed: We encourage you to review our 2021 ESG Report (located on our website at https://ontoinnovation.com/company/corporate-social-responsibility) for more detailed information regarding our ESG initiatives.
+Added: We encourage you to review our 2022 ESG Report (located on our website at https://ontoinnovation.com/company/environmental-social-governance) for more detailed information regarding our ESG initiatives.
Nothing on our website, including our ESG Report or sections thereof, is deemed incorporated by reference into this Form 10-K.
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Such regulations include, but are not limited to:
−Removed: The Restriction of Hazardous Substances Directive (“RoHS”), which restricts the use of certain hazardous substances in electrical and electronic equipment;
−Removed: General Data Protection Regulation (“GDPR”), which provides guidelines for the collection and processing of personal information from individuals who live in the European Union;
−Removed: Foreign Corrupt Practices Act (“FCPA”), which prohibits companies and their individual officers from influencing foreign officials with any personal payments or rewards;
−Removed: Conflict minerals reporting, which imposes disclosure requirements regarding the use of “conflict”
−Removed: minerals mined from the Democratic Republic of Congo and adjoining countries in products;
+Added: • The Restriction of Hazardous Substances Directive (“RoHS”), which restricts the use of certain hazardous substances in electrical and electronic equipment;
+Added: • General Data Protection Regulation (“GDPR”), which provides guidelines for the collection and processing of personal information from individuals who live in the European Union, and similar laws and regulations in other jurisdictions in which we operate;
+Added: Foreign Corrupt Practices Act (“FCPA”), which prohibits companies and their individual officers from influencing foreign officials with any personal payments or rewards;
+Added: • Conflict minerals reporting, which imposes disclosure requirements regarding the use of “conflict” minerals mined from the Democratic Republic of Congo and adjoining countries in products;
• Export regulations.
Our compliance with export regulations has negatively impacted our ability to compete for the business of domestic customers in China, which has adversely affected our results of operations.
−Removed: For additional discussion of the impact of trade policies and export regulations on our competitive position, see “Part I, Item IA - Risk Factors - Tariffs, export regulations, and other market barriers have impacted and may continue to impact ability to compete for the business of domestic customers in China, which may adversely affect our results of operations”
−Removed: and “PART I, Item 7 - management’s Discussion and Analysis of Financial Condition and Results of Operations - Key Events - Expanded U.S.
−Removed: Export Controls.”
+Added: For additional discussion of the impact of trade policies and export regulations on our competitive position, see “Part I, Item IA - Risk Factors - Tariffs, export regulations, and other market barriers have impacted and may continue to impact our ability to compete for the business of domestic customers in China and other jurisdictions, and our results of operations.”
Available Information
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The information on our website is not incorporated into this Form 10-K.
−Removed: Our Annual Report on Form 10-K, Quarterly Reports on Form 10-Q and Current Reports on Form 8-K (and any amendments to those reports) are made available free of charge, on or through our Internet website, as soon as reasonably practicable after such material is electronically filed with or furnished to the SEC.
−Removed: All filings we make with the SEC are also available free of charge via EDGAR through the SEC’s website at http://www.sec.gov.
+Added: Our Annual Report on Form 10-K, Quarterly Reports on Form 10-Q and Current Reports on Form 8-K (and any amendments to those reports) are made available free of charge, on or through our Internet website, as soon as reasonably practicable after such material is electronically filed with or furnished to the United States Securities and Exchange Commission (the “SEC”).
+Added: All filings we make with the SEC are also available free of charge via EDGAR through the SEC’s website at http://www.sec.gov.
In addition, the historic reports and materials that were filed by Nanometrics and Rudolph with the SEC are available at our investor relations website at https://investors.ontoinnovation.com.
−Removed: These filings may also be obtained through the SEC’s website.
−Removed: Documents that are not available through the SEC’s website may also be obtained by submitting an online request to the SEC at http://www.sec.gov.
−Removed: We also make available, free of charge, through our investor relations website, our corporate governance summary, Code of Business Conduct and Ethics, charters of the committees of our Board of Directors, and other information and materials, including information about how to contact our Board of Directors.
+Added: These filings may also be obtained through the SEC’s website.
+Added: Documents that are not available through the SEC’s website may also be obtained by submitting an online request to the SEC at http://www.sec.gov.
+Added: We also make available, free of charge, through our investor relations website, our corporate governance guidelines, Code of Business Conduct and Ethics, charters of the committees of our Board of Directors, and other information and materials, including information about how to contact our Board of Directors.
Investors and others should also note that we announce material financial information to our investors using our investor relations website, SEC filings, press releases, public conference calls and webcasts.
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Compared sentence by sentence after normalising whitespace, quotation marks, case and digits, so re-formatting and restated figures do not read as changed language. Wording changes appear as one removal and one addition. The current filing and the prior one are authoritative.